LMC6484AIN/NOPB National Semiconductor, LMC6484AIN/NOPB Datasheet - Page 12

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LMC6484AIN/NOPB

Manufacturer Part Number
LMC6484AIN/NOPB
Description
IC OP AMP QUAD CMOS R-R 14-DIP
Manufacturer
National Semiconductor
Datasheets

Specifications of LMC6484AIN/NOPB

Amplifier Type
General Purpose
Number Of Circuits
4
Output Type
Rail-to-Rail
Slew Rate
1.3 V/µs
Gain Bandwidth Product
1.5MHz
Current - Input Bias
0.02pA
Voltage - Input Offset
110µV
Current - Supply
2.6mA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
3 V ~ 15.5 V, ±1.5 V ~ 7.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Bandwidth
1.5 MHz
Channel Separation
150
Common Mode Rejection Ratio
82
Current, Input Bias
0.02 pA
Current, Input Offset
0.01 pA
Current, Output
30 mA
Current, Supply
2 mA
Harmonic Distortion
0.01 %
Impedance, Thermal
70 °C/W
Number Of Amplifiers
Quad
Package Type
MDIP-14
Resistance, Input
10 Teraohms
Temperature, Operating, Range
-40 to +85 °C
Voltage, Gain
666 V/mV
Voltage, Input
3 to 15.5 V
Voltage, Noise
37 nV/sqrt Hz
Voltage, Offset
0.11 mV
Voltage, Output, High
14.7 V
Voltage, Output, Low
0.16 V
Voltage, Supply
5 V
Number Of Channels
4
Voltage Gain Db
116.47 dB
Common Mode Rejection Ratio (min)
70 dB
Input Offset Voltage
0.75 mV at 5 V
Operating Supply Voltage
5 V, 9 V, 12 V, 15 V
Supply Current
2.8 mA at 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
Other names
*LMC6484AIN
*LMC6484AIN/NOPB
LMC6484AIN
www.national.com
Application Information
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4 . This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
Improved frequency response is achieved by indirectly driv-
ing capacitive loads as shown in Figure 6 .
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifier’s inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7 .
Compensated to Handle a 330 pF Capacitive Load
FIGURE 6. LMC6484 Non-Inverting Amplifier,
the LMC6484 Circuit in Figure 4
FIGURE 5. Pulse Response of
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
DS011714-17
(Continued)
DS011714-15
DS011714-18
12
5.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resis-
tance with amplifiers that have ultra-low input current, like
the LMC6484. Large feedback resistors can react with small
values of input capacitance due to transducers, photo-
diodes, and circuit board parasitics to reduce phase
margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8 ), C
or
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. when one wishes to take advantage
FIGURE 8. Canceling the Effect of Input Capacitance
f
f
may be different. The values of C
, is first estimated by:
FIGURE 7. Pulse Response of
LMC6484 Circuit in Figure 6
R
1
C
IN
R
2
C
f
f
DS011714-19
should be
DS011714-16

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