MCP6G03-E/P Microchip Technology, MCP6G03-E/P Datasheet - Page 7
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MCP6G03-E/P
Manufacturer Part Number
MCP6G03-E/P
Description
IC GAIN BLOCK 1.8V 1CH 8-DIP
Manufacturer
Microchip Technology
Datasheet
1.MCP6G01UT-EOT.pdf
(38 pages)
Specifications of MCP6G03-E/P
Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
4.5 V/µs
-3db Bandwidth
900kHz
Current - Input Bias
1pA
Voltage - Input Offset
1000µV
Current - Supply
110µA
Current - Output / Channel
20mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Gain Bandwidth Product
-
1.1
1.1.1
The ideal SGA output voltage (V
EQUATION 1-1:
This equation holds when there are no gain or offset
errors.
1.1.2
The SGA’s linear region of operation is modeled by the
line V
and gain errors, but does not include non-linear effects.
EQUATION 1-2:
This line’s endpoints are 0.3V from the supply rails
(V
input offset voltage specifications (in the electrical
specifications) relate to
EQUATION 1-3:
The input offset specification describes V
G = +1 V/V.
© 2006 Microchip Technology Inc.
Where:
Where:
O_ID
Where:
G is the nominal gain
O_LIN
V
V
G is the nominal gain
g
V
V
V
= 0.3V and V
O_ID
REF
g
V
V
V
E
OS
O_LIN
REF
E
OS
1
2
DC Output Voltage Specs / Model
is the gain error
=
=
=
shown in
is the input offset voltage
IDEAL MODEL
LINEAR MODEL
=
=
=
=
100%
V
V
V
=
------------------------ - ,
G 1
OUT
OUT
GV
V
SS
(
SS
G 1
IN
V
(
=
+
–
–
⋅
1
=
---------------------------- -
V
V
V
g
Figure
0V
+
DD
DD
E
0V
O_ID
O_ID
V
g
)
2
Figure 1-3
E
– 0.3V). The gain error and
–
–
) V
⎛
⎝
0.6V
,
,
V
1-3. V
1
G
IN
OUT
V
V
–
=
O_ID
O_ID
0.3V
----------- -
+1
O_LIN
G
as follows:
) is (see
=
=
+
includes offset
V
0.3V
V
OS
DD
Figure
⎞
⎠
–
+
0.3V
0.3V
OS
1-3):
at
MCP6G01/1R/1U/2/3/4
The DC Gain Drift (ΔG/ΔT
change in g
following equation:
EQUATION 1-4:
FIGURE 1-3:
1.1.3
Figure 1-4
output voltage. INL is the output non-linearity error not
explained by V
EQUATION 1-5:
The output non-linearity specification (in the Electrical
Specifications, with units of % of FSR) is related to
Figure 1-4
EQUATION 1-6:
Note that the Full Scale Range (FSR) is V
(0.3V to V
V
DD
V
-0.3
Δ
Δ
0.3
DD
G
G
0
Where:
V
DD
Δ ⁄
Δ ⁄
OUT
0
shows the Integral Non-Linearity (INL) of the
by:
E
OUTPUT NON-LINEARITY
T
T
– 0.3V).
V
V
across temperature. This is shown in the
A
A
V
0.3
(V)
O_LIN
3
4
ONL
G
=
=
INL
=
=
G
100%
max INL
max INL
:
=
⋅
=
Δ
--------- - ,
Δ
100%
Output Voltage Model.
g
T
V
– (
(
E
⋅
A
OUT
A
Δ
--------- - ,
Δ
) can be calculated from the
g
T
E
A
⋅
)
–
max V
------------------------------ -
)
V
in units of V/V/°C
V
V
DD
DD
O_LIN
G
(
in units of %/°C
-0.3 V
–
3
0.6V
,
DS22004B-page 7
V
4
)
G
DD
V
V
DD
V
2
1
IN
– 0.6V
(V)