HFA1112IB Intersil, HFA1112IB Datasheet - Page 4

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HFA1112IB

Manufacturer Part Number
HFA1112IB
Description
IC BUFFER 850MHZ 8-SOIC
Manufacturer
Intersil
Datasheet

Specifications of HFA1112IB

Amplifier Type
Buffer
Number Of Circuits
1
Slew Rate
2400 V/µs
-3db Bandwidth
850MHz
Current - Input Bias
25µA
Voltage - Input Offset
8000µV
Current - Supply
21mA
Current - Output / Channel
60mA
Voltage - Supply, Single/dual (±)
9 V ~ 11 V, ±4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
Gain Bandwidth Product
-

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Electrical Specifications
NOTES:
Application Information
Closed Loop Gain Selection
The HFA1112 features a novel design which allows the user
to select from three closed loop gains, without any external
components. The result is a more flexible product, fewer part
types in inventory, and more efficient use of board space.
This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1, while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN grounded.
The table below summarizes these connections:
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Rise Time
(V
Overshoot
(V
Notes 2, 3, 4)
0.1% Settling Time (Note 3)
0.05% Settling Time
Overdrive Recovery Time
Differential Gain
Differential Phase
2. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
3. See Typical Performance Curves for more information.
4. Overshoot decreases as input transition times increase, especially for A
OUT
OUT
GAIN
(A
+1
+2
-1
CL
= 2V Step)
= 0.5V Step, Input t
)
PARAMETER
+INPUT (PIN 3)
GND
Input
Input
R
/t
F
= 200ps,
CONNECTIONS
4
V
SUPPLY
= ±5V, A
A
A
A
A
A
A
V
V
V
A
A
A
A
V
V
V
V
V
V
OUT
OUT
V
V
V
V
-INPUT (PIN 2)
IN
NC (Floating)
= +1, 3.58MHz, R
= +2, 3.58MHz, R
= +1, 3.58MHz, R
= +2, 3.58MHz, R
= -1
= +1
= +2
= -1
= +1
= +2
= 5V
TEST CONDITIONS
= 2V to 0V
= 2V to 0V
GND
Input
V
= +1, R
P-P
L
= 100Ω, Unless Otherwise Specified (Continued)
HFA1112
L
L
L
L
= 150Ω
= 150Ω
= 150Ω
= 150Ω
V
TEMP (
= +1. Please refer to Typical Performance Curves.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
For unity gain applications, care must also be taken to
minimize the capacitance to ground seen by the amplifier’s
inverting input. At higher frequencies this capacitance will
tend to short the -INPUT to GND, resulting in a closed loop
gain which increases with frequency. This will cause
excessive high frequency peaking and potentially other
problems as well.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
limiting system bandwidth well below the amplifier
bandwidth of 850MHz. By decreasing R
S
25
25
25
25
25
25
25
25
25
25
25
25
25
and C
o
C)
L
form a low pass network at the output, thus
MIN
-
-
-
-
-
-
-
-
-
-
-
-
-
TYP
0.82
1.06
1.00
0.03
0.02
0.05
0.04
8.5
12
45
11
15
6
S
) in series with the output
MAX
30
65
20
-
-
-
-
-
-
-
-
-
-
S
as C
S
L
and C
Degrees
Degrees
increases
UNITS
ns
ns
ns
ns
ns
ns
%
%
%
%
%
L

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