LTC1052CH Linear Technology, LTC1052CH Datasheet - Page 6

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LTC1052CH

Manufacturer Part Number
LTC1052CH
Description
LOW NOISE CHOPPER STAB OA
Manufacturer
Linear Technology
Series
LTCMOS™r
Datasheet

Specifications of LTC1052CH

Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Slew Rate
4 V/µs
Gain Bandwidth Product
1.2MHz
Current - Input Bias
1pA
Voltage - Input Offset
0.5µV
Current - Supply
1.7mA
Voltage - Supply, Single/dual (±)
4.75 V ~ 16 V, ±2.38 V ~ 8 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
TO-5-8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
Current - Output / Channel
-
-3db Bandwidth
-
LTC1052/LTC7652
DC OPERATION
The shaded portion of the LTC1052 block diagram
(Figure 1a) entirely determines the amplifier’s DC
characteristics. During the auto zero portion of the cycle,
the g
closed around the input stage to null its offset. Switch S2
and capacitor C
nulling voltage during the next step—the sampling cycle.
In the sampling cycle, the zeroed amplifier is used to
amplify the differential input voltage. Switch S2 connects
the amplified input voltage to C
THEORY OF OPERATIO
6
TYPICAL PERFOR A CE CHARACTERISTICS
TEST CIRCUITS
m1
inputs are shorted together and a feedback path is
Electrical Characteristics Test Circuit (TC1)
EXTA
R1
1k
0.1µF
act as a sample-and-hold to store the
3
2
+
INPUT
LTC1052
1
V
V
W
{
+
7
4
1M
R2
V
OUTPUT
8
REF
EXTB
6
0.1µF
U
+ OVERDRIVE
V
REF
{
and the output gain
– 1mV
U
LTC1052/7652 • TC01
–5V
R
5V
L
OUTPUT
Response Time vs Overdrive
50µV
20ms/DIV
BANDWIDTH
10µV
R1
0.1µF
stage. C
amplified input signal during the auto zero cycle.
By switching between these two states at a frequency
much higher than the signal frequency, a continuous
output results.
Notice that during the auto zero cycle the g
not only shorted together, but are also shorted to the
inverting input. This forces nulling with the common mode
voltage present and accounts for the extremely high
CMRR of the LTC1052. In the same fashion, variations in
10Hz
1Hz
2
3
5µV
+
DC to 10Hz and DC to 1HZ Noise Test Circuit (TC3)
LTC1052
R2
1
C2
V
V
EXTB
+
16.2Ω
16.2Ω
7
4
R1
8
and S2 act as a sample-and-hold to store the
6
0.1µF
162k
162k
R2
R3
R4
16.2k
162k
R3
C4
C3
3
2
16.2k
34k
162k
R4
+
LT1001
34k
0.1µF
1.0µF
C2
6
m1
1.0µF
1.0µF
OUTPUT
(NOISE x 20,000)
C3
inputs are
LTC1052/7652 • TC02
1.0µF
1.0µF
1052fa
C4

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