AD648JR Analog Devices Inc, AD648JR Datasheet - Page 8

IC OPAMP BIFET 1MHZ DUAL 8SOIC

AD648JR

Manufacturer Part Number
AD648JR
Description
IC OPAMP BIFET 1MHZ DUAL 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD648JR

Mounting Type
Surface Mount
Rohs Status
RoHS non-compliant
Amplifier Type
J-FET
Number Of Circuits
2
Slew Rate
1.8 V/µs
Gain Bandwidth Product
1MHz
Current - Input Bias
5pA
Voltage - Input Offset
750µV
Current - Supply
340µA
Current - Output / Channel
15mA
Voltage - Supply, Single/dual (±)
±4.5 V ~ 18 V
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
No. Of Amplifiers
2
Bandwidth
1MHz
No. Of Pins
8
Peak Reflow Compatible (260 C)
No
Input Bias Current
20pA
Input Offset Voltage Max
2mV
Common Mode Ratio
76
Output Type
-
-3db Bandwidth
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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AD648
Figure 23c shows a diode clamp protection scheme for an I-to-V
converter using low leakage diodes. Because the diodes are
connected to the op amp’s summing junction, which is a virtual
ground, their leakage contribution is minimal.
Exceeding the negative common-mode range on either input
terminal causes a phase reversal at the output, forcing the ampli-
fier output to the corresponding high or low state. Exceeding
the negative common mode on both inputs simultaneously
forces the output high. Exceeding the positive common-mode
range on a single input does not cause a phase reversal; but if
both inputs exceed the limit, the output will be forced high. In
all cases, normal amplifier operation is resumed when input
voltages are brought back within the common-mode range.
D/A CONVERTER BIPOLAR OUTPUT BUFFER
The circuit in Figure 24 provides 4 quadrant multiplication with
a resolution of 12 bits. The AD648 is used to convert the AD7545
Figure 23c. I-to-V Converter with Diode Input Protection
SIGN BIT
0
0
1
1
NOTE
SIGN BIT AT “0“ CONNECTS THE NONINVERTING INPUT OF
A2 TO ANALOG COMMON
Figure 24. 12-Bit Plus Sign Magnitude D/A Converter
BINARY NUMBER IN DAC REGISTER ANALOG OUTPUT
1111 1111 1111
0000 0000 0000
0000 0000 0000
1111 1111 1111
Figure 25. Sign Magnitude Code Table
–8–
CMOS DAC’s output current to a voltage and provides the
necessary level shifting to achieve a bipolar voltage output. The
circuit operates with a 12-bit plus sign input code. The transfer
function is shown in Figure 25.
The AD7592 is a fully protected dual CMOS SPDT switch with
data latches. R4 and R5 should match to within 0.01% to main-
tain the accuracy of the converter. A mismatch between R4 and
R5 introduces a gain error. Overall gain is trimmed by adjusting
R
perature, and excellent dynamics make it an attractive low
power output buffer.
The input offset voltage of the AD648 output amplifier results
in an output error voltage. This error voltage equals the input
offset voltage of the op amp times the noise gain of the amplifier.
That is:
R
the DAC. R
value of R
the offset error voltage at the amplifier’s output. An output
amplifier with a sub millivolt input offset voltage is needed to
preserve the linearity of the DAC’s transfer function.
IN
FB
. The AD648’s low input offset voltage, low drift over tem-
is the feedback resistor for the op amp, which is internal to
O
O
is code dependent. This has the effect of changing
+V
0 V
0 V
–V
is the DAC’s R-2R ladder output resistance. The
V
IN
IN
OS
(4095/4096)
(4095/4096)
Output = V
OS
Input 1 +
R
R
FB
O
REV. E

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