EL5130IS Intersil, EL5130IS Datasheet
EL5130IS
Specifications of EL5130IS
Related parts for EL5130IS
EL5130IS Summary of contents
Page 1
... Ld SOIC (Note) (150 mil) (Pb-free) EL5130IS-T7 5130IS 7” SOIC (150 mil) EL5130ISZ-T7 5130ISZ 7” SOIC (Note) (150 mil) (Pb-free) EL5130IS-T13 5130IS 13” SOIC (150 mil) EL5130ISZ-T13 5130ISZ 13” SOIC (Note) (150 mil) (Pb-free) EL5131IW-T7 BBAA 7” SOT-23 MDP0038 (3k pcs) EL5131IWZ-T7 BRAA 7” ...
Page 2
... N i Input Noise Current N 2 EL5130, EL5131 Thermal Information = +25°C) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = -5V 500Ω 50Ω ...
Page 3
Typical Performance Curves -10 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 1. OPEN LOOP GAIN AND PHASE vs FREQUENCY 5 V =± =+ =50Ω =500Ω =5pF ...
Page 4
Typical Performance Curves 5 V =± =+ =50Ω =5pF =500Ω =150Ω =100Ω 0 FREQUENCY (MHz) FIGURE 7. GAIN vs FREQUENCY ...
Page 5
Typical Performance Curves 5 V =± =+ =50Ω =18pF =500Ω =5pF =15pF =10pF 0 FREQUENCY (MHz) FIGURE 13. ...
Page 6
Typical Performance Curves =±5V S -10 - -90 1k 10k 100k 1M FREQUENCY (Hz) FIGURE 19. PSRR vs FREQUENCY ...
Page 7
Typical Performance Curves -30 V =± =+10 V -40 R =50Ω =500Ω =5pF L -50 V =2V OUT P-P -60 -70 3RD HD -80 -90 0.5 1 FUNDAMENTAL FREQUENCY (MHz) FIGURE 25. HARMONIC DISTORTION ...
Page 8
Typical Performance Curves 2 1 INPUT 400mV P-P 0 OUTPUT RISE TIME 2V 4.4ns P -20 - TIME (ns) FIGURE 31. LARGE SIGNAL PULSE RESPONSE/RISE TIME 3 2 OUTPUT SLEW RATE 1 4V 275V/µs P-P ...
Page 9
Typical Performance Curves =± =+5 - =50Ω =500Ω =5pF L -20 0 FREQUENCY (MHz) FIGURE 37. THIRD-ORDER INTERCEPT POINT 0.03 0.01 -0.01 -0.03 - ...
Page 10
Typical Performance Curves JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.2 909mW 1 0.8 0.6 435mW 0.4 0 AMBIENT TEMPERATURE (°C) FIGURE 42. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 10 EL5130, EL5131 ...
Page 11
Small Outline Package Family (SO PIN #1 I.D. MARK 0.010 SEATING PLANE 0.004 C 0.010 MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) SYMBOL SO-8 SO-14 ...
Page 12
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...