EL5127CY-T7 Intersil, EL5127CY-T7 Datasheet
EL5127CY-T7
Specifications of EL5127CY-T7
Related parts for EL5127CY-T7
EL5127CY-T7 Summary of contents
Page 1
... Portable instrumentation CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. FN7111.4 ...
Page 2
... Ordering Information PART NUMBER PART MARKING EL5127CY R EL5127CY-T7 R EL5127CY-T13 R EL5127CYZ (Note) BAAAH EL5127CYZ-T7 (Note) BAAAH EL5127CYZ-T13 (Note) BAAAH EL5227CL 5227CL EL5227CL-T7 5227CL EL5227CL-T13 5227CL EL5227CLZ (Note) 5227CLZ EL5227CLZ-T7 (Note) 5227CLZ EL5227CLZ-T13 (Note) 5227CLZ EL5227CR 5227CR EL5227CR-T7 5227CR EL5227CR-T13 5227CR EL5227CRZ (Note) ...
Page 3
... NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. ...
Page 4
Pinouts EL5127 (10 LD MSOP) TOP VIEW VIN1 VIN1 1 10 VOUT1 VIN2 VIN2 2 9 VOUT2 VIN3 VS VS- VIN4 VIN3 4 7 VOUT3 VS+ VIN4 5 6 VOUT4 VS+ VIN5 VIN6 VIN7 VIN8 EL5227, EL5327 (24 ...
Page 5
... Slew rate is measured on rising and falling edges. 5 EL5127, EL5227, EL5327, EL5427 Thermal Information Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C - -0.5V, V +0.5V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150° Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = -5V 10kΩ 10pF to 0V CONDITIONS ...
Page 6
Electrical Specifications +5V PARAMETER DESCRIPTION INPUT CHARACTERISTICS V Input Offset Voltage OS TCV Average Offset Voltage Drift OS I Input Bias Current B R Input Impedance IN C Input Capacitance IN A Voltage Gain V ...
Page 7
Electrical Specifications +15V PARAMETER DESCRIPTION INPUT CHARACTERISTICS V Input Offset Voltage OS TCV Average Offset Voltage Drift OS I Input Bias Current B R Input Impedance IN C Input Capacitance IN AV Voltage Gain OUTPUT ...
Page 8
Typical Performance Curves 20 C =10pF L V =± 10kΩ 0 562Ω -10 150Ω -20 -30 1K 10K 100K FREQUENCY (Hz) FIGURE 1. FREQEUNCY RESPONSE FOR VARIOUS R 2000 T =25° =±5V S 1600 1200 800 ...
Page 9
Typical Performance Curves 100 V =± =10kΩ =±50mV =25° 100 CAPACITANCE (pF) FIGURE 7. SMALL SIGNAL OVERSHOOT vs LOAD CAPACITANCE 3.5 V =±5V ...
Page 10
Typical Performance Curves 2.255 2.245 2.235 2.225 V =±5V S 2.215 -40 - TEMPERATURE (°C) FIGURE 13. SLEW RATE vs TEMPERATURE 0.195 T =25°C A 0.19 0.185 0.18 0.175 0.17 0.165 SUPPLY VOLTAGE ...
Page 11
Typical Performance Curves JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.333W 1.2 1.176W 1.111W 1 0.8 TSSOP28 θ =75°C/W 0.6 JA TSSOP20 0.4 θ =90°C AMBIENT TEMPERATURE (°C) FIGURE 19. PACKAGE ...
Page 12
FIGURE 22. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT Short Circuit Current Limit The EL5127, EL5227, EL5327, and EL5427 will limit the short circuit current to ±120mA if the output is directly ...
Page 13
Driving Capacitive Loads The EL5127, EL5227, EL5327, and EL5427 can drive a wide range of capacitive loads. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The buffers drive 10pF loads in ...
Page 14
Mini SO Package Family (MSOP) 0. SEATING PLANE b 0. LEADS L1 c SEE DETAIL "X" DETAIL X 14 EL5127, EL5227, EL5327, EL5427 ...
Page 15
QFN (Quad Flat No-Lead) Package Family PIN #1 3 I.D. MARK 2X 0.075 C TOP VIEW 0. (E2) 7 (D2) BOTTOM VIEW 0. SEATING PLANE 0.08 C ...
Page 16
Thin Shrink Small Outline Package Family (TSSOP (N/2)+ (N/2) B TOP VIEW e C SEATING PLANE b 0.10 0. LEADS SIDE VIEW SEE DETAIL “X” c END VIEW ...
Page 17
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...