EL5420CL Intersil, EL5420CL Datasheet - Page 13

• Manufacturer Part Number: EL5420CL
• Description: IC OPAMP QUAD R-R 12MHZ 16-QFN
• Manufacturer: Intersil

Specifications of EL5420CL

• Amplifier Type: Voltage Feedback
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Slew Rate: 10 V/µs
• Gain Bandwidth Product: 8MHz
• -3db Bandwidth: 12MHz
• Current - Input Bias: 2nA
• Voltage - Input Offset: 2000µV
• Current - Supply: 500µA
• Current - Output / Channel: 30mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 16.5 V, ±2.25 V ~ 8.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

supply voltage, plus the power in the IC due to the loads as
shown in Equation 2:
P
when sourcing, and:
P
when sinking.
where:
• i = 1 to 2 for dual and 1 to 4 for quad
• V
• I
• V
• I
If we set the two P
can solve for R
provide a convenient way to see if the device will overheat.
The maximum safe power dissipation can be found
graphically, based on the package type and the ambient
temperature. By using the previous equation, it is a simple
matter to see if P
curves. To ensure proper operation, it is important to observe
the recommended derating curves in Figure 27.
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
Driving Capacitive Loads
The EL5120, EL5220, and EL5420 can drive a wide range of
capacitive loads. As load capacitance increases, however,
the -3dB bandwidth of the device will decrease and the
peaking will increase. The amplifiers drive 10pF loads in
DMAX
DMAX
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
SMAX
LOAD
S
OUT
= Total supply voltage
=
=
i = Maximum output voltage of the application
i = Load current
= Maximum supply current per amplifier
3.0
2.5
2.0
1.5
1.0
0.5
Σi
Σi
0
×
×
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
TEMPERATURE
1.800W
870mW
[
[
2.27W
1.22W
V
V
LOAD
S
S
DMAX
×
×
DMAX
θ
25
JA
I
I
SMAX
SMAX
AMBIENT TEMPERATURE (°C)
i to avoid device overheat. Figure 27
MSOP8
θ
= 115°C/W
JA
exceeds the device's power derating
QFN16
equations equal to each other, we
= 44°C/W
50
+
+
(
(
V
V
13
S
OUT
+
1.08W
75
–
i
85
V
θ
–
θ
JA
OUT
JA
V
TSSOP14
DFN8
= 55°C/W
100
S
= 93°C/W
- )
i )
θ
×
JA
×
I
SOIC14
I
LOAD
LOAD
= 82°C/W
125
EL5120, EL5220, EL5420
i
i
]
]
150
(EQ. 2)
(EQ. 3)
parallel with 10kΩ with just 1.5dB of peaking, and 100pF
with 6.4dB of peaking. If less peaking is desired in these
applications, a small series resistor (usually between 5Ω and
50Ω) can be placed in series with the output. However, this
will obviously reduce the gain slightly. Another method of
reducing peaking is to add a “snubber” circuit at the output.
A snubber is a shunt load consisting of a resistor in series
with a capacitor. Values of 150Ω and 10nF are typical. The
advantage of a snubber is that it does not draw any DC load
current or reduce the gain
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5120, EL5220, and EL5420 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to ground, a 0.1µF ceramic capacitor should be
placed from VS+ to pin to VS- pin. A 4.7µF tantalum
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
March 4, 2009
FN7186.6