X40020S14Z-B Intersil, X40020S14Z-B Datasheet - Page 5

• Manufacturer Part Number: X40020S14Z-B
• Description: IC VOLTAGE MONITOR DUAL 14-SOIC
• Manufacturer: Intersil
• Type: Multi-Voltage Supervisorr

Specifications of X40020S14Z-B

• Number Of Voltages Monitored: 2
• Output: Open Drain or Open Collector
• Reset: Active High
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: 2.6V, 4.6V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRINCIPLES OF OPERATION
Power-on Reset
Applying power to the X40020/21 activates a Power-
on Reset Circuit that pulls the RESET/RESET pins
active. This signal provides several benefits.
– It prevents the system microprocessor from starting
– It prevents the processor from operating prior to sta-
– It allows time for an FPGA to download its configura-
– It prevents communication to the EEPROM, greatly
When V
for t
(X40021) and RESET (X40020) pin allowing the system
to begin operation.
Figure 1. Connecting a Manual Reset Push-Button
Manual Reset
By connecting a push-button directly from MR to
ground, the designer adds manual system reset capa-
bility. The MR pin is LOW while the push-button is
closed and RESET/RESET pin remains LOW for
t
thereafter. A weak pull up resistor is connected to the
MR pin.
Low Voltage V1 Monitoring
During operation, the X40020/21 monitors the V
level and asserts RESET if supply voltage falls below
a preset minimum V
the microprocessor from operating in a power fail or
brownout condition. The V1FAIL signal remains active
until the voltage drops below 1V. It also remains active
until V
PURST
to operate with insufficient voltage.
bilization of the oscillator.
tion prior to initialization of the circuit.
reducing the likelihood of data corruption on power-up.
PURST
System
Reset
CC
or till the push-button is released and for t
CC
returns and exceeds V
(selectable) the circuit releases the RESET
exceeds the device V
RESET
TRIP1
X40020
MR
. The RESET signal prevents
5
TRIP1
TRIP1
for
threshold value
t
PURST
Manual
Reset
.
PURST
X40020, 40021
CC
Low Voltage V2 Monitoring
The X40020/21 also monitors a second voltage level and
asserts V2FAIL if the voltage falls below a preset mini-
mum V
RESET to prevent the microprocessor from operating in
a power fail or brownout condition or used to interrupt the
microprocessor with notification of an impending power
failure. The V2FAIL signal remains active until the V
drops below 1V (V
V2MON returns and exceeds V
V2MON voltage monitor is powered by V
and V
Figure 2. Two Uses of Multiple Voltage Monitoring
WATCHDOG TIMER
The Watchdog Timer circuit monitors the microprocessor
activity by monitoring the SDA and SCL pins. A standard
read or write sequence to any slave address byte
restarts the watchdog timer and prevents the WDO sig-
nal to go active. A minimum sequence to reset the
watchdog timer requires four microprocessor instructions
namely, a Start, Clock Low, Clock High and Stop. The
state of two nonvolatile control bits in the Status Register
determine the watchdog timer period. The microproces-
sor can change these watchdog bits by writing to the
X40020/21 control register (also refer to page 21).
Notice: No external components required to monitor two voltages.
Unreg.
Supply
Resistors selected so 3V appears on V2MON when unregulated
BATT
Unreg.
Supply
TRIP2
go away, V2MON cannot be monitored.
R
R
. The V2FAIL signal is either ORed with
Reg
Reg
3V
5V
CC
Reg
supply reaches 6V.
5V
falling). It also remains active until
V
V2MON
CC
X40021
V2MON
V
RESET
V2FAIL
CC
TRIP2
X40020
RESET
V2FAIL
.
V
OUT
V
OUT
OUT.
May 17, 2006
System
Reset
If V
System
Reset
FN8112.1
CC
CC