LT3080EDD#PBF Linear Technology, LT3080EDD#PBF Datasheet - Page 10

IC REG LDO ADJ 1.1A 8-DFN

LT3080EDD#PBF

Manufacturer Part Number
LT3080EDD#PBF
Description
IC REG LDO ADJ 1.1A 8-DFN
Manufacturer
Linear Technology
Datasheet

Specifications of LT3080EDD#PBF

Regulator Topology
Positive Adjustable
Voltage - Output
0 ~ 36 V
Voltage - Input
1.2 ~ 36 V
Voltage - Dropout (typical)
1.35V @ 1.1A
Number Of Regulators
1
Current - Output
1.1A
Current - Limit (min)
1.1A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-DFN
Voltage Regulator Type
Linear
Topology
LDO
Regulator Output Type
Adjustable
Polarity Type
Positive
Number Of Outputs
Single
Input Voltage (min)
1.2V
Input Voltage (max)
36V
Output Voltage
0 to 30V
Package Type
DFN EP
Output Current
1.1A
Load Regulation
1.3mV
Line Regulation
0.003mV/V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Dropout Voltage@current (max)
0.2@100mA/0.5@1100mA
Pin Count
8
Mounting
Surface Mount
Quiescent Current (max)
1mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
LT3080
APPLICATIONS INFORMATION
available in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be signifi cant enough
to drop capacitor values below appropriate levels. Capaci-
tor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verifi ed.
Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric microphone works. For a
10
Figure 3. Ceramic Capacitor Temperature Characteristics
Figure 2. Ceramic Capacitor DC Bias Characteristics
–100
–100
–20
–40
–60
–80
–20
–40
–60
–80
40
20
20
0
0
–50
0
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
–25
2
4
DC BIAS VOLTAGE (V)
0
TEMPERATURE (°C)
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
6
25
8
Y5V
X5R
50
10
Y5V
75
12
X5R
100
14
3080 F03
3080 F02
125
16
ceramic capacitor the stress can be induced by vibrations
in the system or thermal transients.
Paralleling Devices
LT3080’s may be paralleled to obtain higher output current.
The SET pins are tied together and the IN pins are tied
together. This is the same whether it’s in three terminal
mode or has separate input supplies. The outputs are
connected in common using a small piece of PC trace
as a ballast resistor to equalize the currents. PC trace
resistance in milliohms/inch is shown in Table 1. Only a
tiny area is needed for ballasting.
Table 1. PC Board Trace Resistance
Trace resistance is measured in mOhms/in
The worse case offset between the set pin and the output
of only ± 2 millivolts allows very small ballast resistors
to be used. As shown in Figure 4, the two devices have
a small 10 milliohm ballast resistor, which at full output
current gives better than 80 percent equalized sharing
of the current. The external resistance of 10 milliohms
4.8V TO 28V
WEIGHT (oz)
V
IN
1μF
1
2
V
V
CONTROL
CONTROL
Figure 4. Parallel Devices
V
V
IN
IN
10 mil WIDTH
SET
SET
165k
54.3
27.1
LT3080
LT3080
+
+
OUT
OUT
20 mil WIDTH
10mΩ
10mΩ
27.1
13.6
3080 F04
10μF
V
3.3V
2A
3080fb
OUT

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