LT3022EDHC#PBF Linear Technology, LT3022EDHC#PBF Datasheet - Page 10

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LT3022EDHC#PBF

Manufacturer Part Number
LT3022EDHC#PBF
Description
IC REG LDO ADJ 1A 16DFN
Manufacturer
Linear Technology
Datasheet

Specifications of LT3022EDHC#PBF

Regulator Topology
Positive Adjustable
Voltage - Output
0.2 ~ 9.5 V
Voltage - Input
0.9 ~ 10 V
Voltage - Dropout (typical)
0.145V @ 1A
Number Of Regulators
1
Current - Output
1A
Current - Limit (min)
1.1A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-WFDFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIN FUNCTIONS
LT3022/LT3022-1.2
LT3022-1.5/LT3022-1.8
NC (Pins 1, 2, 8, 15, 16): No Connect Pins. These pins
have no connection to internal circuitry. These pins may
be fl oated, tied to V
performance.
OUT (Pins 3, 4): These pins supply power to the load.
Use a minimum output capacitor of 10μF to prevent
oscillations. Large load transient applications require larger
output capacitors to limit peak voltage transients. See the
Applications Information section for more information on
output capacitance and reverse-output characteristics. The
LT3022 requires a 1mA minimum load current to ensure
proper regulation and stability.
SENSE (Pin 5, Fixed Voltage Device Only): This pin is
the sense point for the internal resistor divider. It should
be tied directly to the OUT pins for best results.
ADJ (Pin 5): This pin is the error amplifi er inverting
terminal. Its 30nA typical input bias current fl ows out of
the pin (see curve of ADJ Pin Bias Current vs Temperature
in the Typical Performance Characteristics). The ADJ pin
reference voltage is 200mV (referred to AGND).
AGND (Pins 6, 7): Analog Ground. Tie these pins directly
to PGND (Pins 10, 11) and the exposed backside GND
(Pin 17). Connect the bottom of the external resistor
divider, setting output voltage, directly to AGND for
optimum regulation.
SHDN (Pin 9): Pulling the SHDN pin low puts the LT3022
into a low power state and turns the output off. Drive the
SHDN pin with either logic or an open-collector/drain device
with a pull-up resistor. The resistor supplies the pull-up
current to the open collector/drain logic, normally several
microamperes, and the SHDN pin current, typically 3μA.
If unused, connect the SHDN pin to V
not function if the SHDN pin is not connected.
10
IN
or tied to GND for improved thermal
IN
. The LT3022 does
PGND (Pins 10, 11): Power Ground. The majority of
ground pin current fl ows out of PGND. Tie these pins
directly to AGND (Pins 6, 7) and the exposed backside
GND (Pin 17).
IN (Pins 12, 13,14): These pins supply power to the device.
The LT3022 requires a bypass capacitor at IN if located
more than six inches from the main input fi lter capacitor.
Include a bypass capacitor in battery-powered circuits
as a battery’s output impedance rises with frequency. A
minimum bypass capacitor of 10μF suffi ces. The LT3022
withstands reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reversed input,
which occurs if a battery is plugged in backwards, the
LT3022 behaves as if a diode is in series with its input.
No reverse current fl ows into the LT3022 and no reverse
voltage appears at the load. The device protects itself and
the load.
GND (Pin 17): Exposed Pad. Tie this pin directly to AGND
(Pins 6, 7), PGND (Pins 10, 11) and the PCB ground.
This pin provides enhanced thermal performance with
its connection to the PCB ground. See the Applications
Information section for thermal considerations and
calculating junction temperature.
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