DSP56321VF200 Freescale Semiconductor, DSP56321VF200 Datasheet - Page 27

• Manufacturer Part Number: DSP56321VF200
• Description: IC DSP 24BIT 200MHZ 196-BGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56321VF200

• Interface: Host Interface, SSI, SCI
• Clock Rate: 200MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 576kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.60V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: 196-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Freescale Semiconductor
No.
20 Delay from RD assertion to interrupt
21 Delay from WR assertion to interrupt
24 Duration for IRQA assertion to recover
25 Delay from IRQA assertion to fetch of
26 Duration of level sensitive IRQA
27 Interrupt Request Rate
28 DMA Request Rate
29 Delay from IRQA, IRQB, IRQC, IRQD,
request deassertion for level sensitive
fast interrupts
request deassertion for level sensitive
fast interrupts
•
•
from Stop state
first instruction (when exiting Stop)
•
•
•
assertion to ensure interrupt service
(when exiting Stop)
•
•
•
•
•
•
•
•
•
•
•
NMI assertion to external memory
(DMA source) access address out
valid
SRAM WS = 3
SRAM WS ≥ 4
DPLL is not active during Stop
(PCTL Bit 1 = 0) and Stop delay is
enabled (Operating Mode Register
Bit 6 = 0)
DPLL is not active during Stop
(PCTL Bit 1 = 0) and Stop delay is
not enabled (Operating Mode
Register Bit 6 = 1)
DPLL is active during Stop (PCTL
Bit 1 = 1; Implies No Stop Delay)
DPLL is not active during Stop
(PCTL bit 1 = 0) and Stop delay is
enabled (Operating Mode Register
Bit 6 = 0)
DPLL is not active during Stop
(PCTL bit 1 = 0) and Stop delay is
not enabled (Operating Mode
Register Bit 6 = 1)
DPLL is active during Stop ((PCTL
bit 1 = 0; implies no Stop delay)
HI08, ESSI, SCI, Timer
DMA
IRQ, NMI (edge trigger)
IRQ, NMI (level trigger)
Data read from HI08, ESSI, SCI
Data write to HI08, ESSI, SCI
Timer
IRQ, NMI (edge trigger)
Characteristics
Table 2-7.
1, 6, 7
1, 6, 7
2, 3
Reset, Stop, Mode Select, and Interrupt Timing
2, 3
DPLT + (20.5 ± 0.5) × T
(WS + 2.5) × T
DPLT + (23.75 ± 0.5) ×
(WS + 3) × T
DPLT + (128 K × T
DPLT + (128K × T
(WS + 3.25) × T
(10.0 ± 1.75) × T
4.25 × T
Expression
DSP56321 Technical Data, Rev. 11
5.5 × T
10.94
12T
12T
8T
8T
6T
7T
2T
3T
T
C
C
C
C
C
C
C
C
C
C
C
+ 2.0
C
C
– 10.94
– 10.94
C
C
C
–
C
)
)
C
662.2
41.25
805.4
150.1
23.25
Min
27.5
8.0
6.9
—
—
—
µs
—
—
—
—
—
—
—
—
200 MHz
Note 7
Note 7
Note 7
209.9
188.8
Max
58.8
60.0
40.0
40.0
60.0
30.0
35.0
10.0
15.0
ms
—
—
—
—
—
662.2
805.4
150.1
21.34
Min
37.5
8.0
6.9
25
—
—
—
µs
—
—
—
—
—
—
—
—
220 MHz
5
Note 7
Note 7
Note 7
209.9
188.8
Max
53.3
54.6
36.4
36.4
54.6
27.3
31.9
13.7
9.1
ms
(CONTINUED)
—
—
—
—
—
662.2
805.4
150.1
19.72
Min
34.4
22.9
8.0
6.9
µs
240 MHz
—
—
—
—
—
—
—
—
—
—
—
AC Electrical Characteristics
Note 7
Note 7
Note 7
209.9
188.8
Max
49.0
50.0
33.4
33.4
50.0
25.0
29.2
12.5
8.3
ms
—
—
—
—
—
662.2
805.4
150.1
17.45
Min
30.0
20.0
8.0
6.9
—
—
—
µs
—
—
—
—
—
—
—
—
275 MHz
Note 7
Note 7
Note 7
209.9
188.8
21.84
25.48
10.92
Max
43.0
43.7
29.2
29.2
43.7
7.28
ms
—
—
—
—
—
Unit
ns
ns
ns
ns
—
µs
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-7