AT91SAM7S64C-MU-999 Atmel, AT91SAM7S64C-MU-999 Datasheet - Page 17
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AT91SAM7S64C-MU-999
Manufacturer Part Number
AT91SAM7S64C-MU-999
Description
IC ARM7 MCU FLASH 64K 64QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7S16-MU.pdf
(51 pages)
Specifications of AT91SAM7S64C-MU-999
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFN
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
AT91SAM7S64B-MU-999
AT91SAM7S64B-MU-999
AT91SAM7S64B-MU-999
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S64C-MU-999
Manufacturer:
TE
Quantity:
3 000
7.4
6175IS–ATARM–30-Aug-10
Peripheral DMA Controller
• Handles data transfer between peripherals and memories
• Eleven channels: AT91SAM7S512/256/128/64/321/161
• Nine channels: AT91SAM7S32/16
• Low bus arbitration overhead
• Next Pointer management for reducing interrupt latency requirements
• Peripheral DMA Controller (PDC) priority is as follows (from the highest priority to the lowest):
– Prefetch buffer, buffering and anticipating the 16-bit requests, reducing the required
– Key-protected program, erase and lock/unlock sequencer
– Single command for erasing, programming and locking operations
– Interrupt generation in case of forbidden operation
– Two for each USART
– Two for the Debug Unit
– Two for the Serial Synchronous Controller
– Two for the Serial Peripheral Interface
– One for the Analog-to-digital Converter
– One Master Clock cycle needed for a transfer from memory to peripheral
– Two Master Clock cycles needed for a transfer from peripheral to memory
wait states
Receive
Receive
Receive
Receive
Receive
Receive
Transmit
Transmit
Transmit
Transmit
Transmit
AT91SAM7S Series Summary
DBGU
USART0
USART1
SSC
ADC
SPI
DBGU
USART0
USART1
SSC
SPI
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