MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 4
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MCF5272VM66
Manufacturer Part Number
MCF5272VM66
Description
IC MPU 66MHZ COLDFIRE 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272VM66
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Cpu Speed
66MHz
Embedded Interface Type
UART, QSPI, USB, TDM
Digital Ic Case Style
BGA
No. Of Pins
196
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
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Company
Part Number
Manufacturer
Quantity
Price
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MCF5272 Architecture
1.2
This section briefly describes the MCF5272 core, SIM, UART, and timer modules, and test access port.
1.2.1
Based on the concept of variable-length RISC technology, ColdFire combines the simplicity of conventional
32-bit RISC architectures with a memory-saving, variable-length instruction set. The main features of the
MCF5272 core are as follows:
The Version 2 ColdFire core has a 32-bit address bus and a 32-bit data bus. The address bus allows direct
addressing of up to 4 Gbytes. It supports misaligned data accesses and a bus arbitration unit for multiple bus
masters.
The Version 2 ColdFire supports an enhanced subset of the 68000 instruction set. The MAC provides new
instructions for DSP applications; otherwise, Version 2 ColdFire user code runs unchanged on 68020,
68030, 68040, and 68060 processors. The removed instructions include BCD, bit field, logical rotate,
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— Versatile programmable chip select signals with wait state generation logic
— Up to three 16-bit parallel input/output ports
— Latchable interrupt inputs with programmable priority and edge triggering
— Programmable interrupt vectors for on-chip peripherals
Physical layer interface controller (PLIC)
— Allows connection using general circuit interface (GCI) or interchip digital link (IDL)
— Three physical interfaces
— Four time-division multiplex (TDM) ports
IEEE 1149.1 boundary-scan test access port (JTAG) for board-level testing
Operating voltage: 3.3 V ±0.3 V
Operating temperature: 0 ° –70 ° C
Operating frequency: DC to 66 MHz, from external CMOS oscillator
Compact ultra low-profile 196 ball-molded plastic ball-grid array package (PGBA)
32-bit address bus directly addresses up to 4 Gbytes of address space
32-bit data bus
Variable-length RISC
Optimized instruction set for high-level language constructs
Sixteen general-purpose 32-bit data and address registers
MAC unit for DSP applications
Supervisor/user modes for system protection
Vector base register to relocate exception-vector table
Special core interfacing signals for integrated memories
Full debug support
MCF5272 Architecture
physical layer protocols for 2B + D data
Version 2 ColdFire Core
MCF5272 Integrated Microprocessor Product Brief
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA