SC16C750IA44,512 NXP Semiconductors, SC16C750IA44,512 Datasheet - Page 27

• Manufacturer Part Number: SC16C750IA44,512
• Description: IC UART 64BYTE 44PLCC
• Manufacturer: NXP Semiconductors

Specifications of SC16C750IA44,512

• Number Of Channels: 1, UART
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Voltage: 2.25 V ~ 5.5 V
• Transmit Fifo: 64Byte
• Receive Fifo: 64Byte
• Transmitter And Receiver Fifo Counter: Yes
• Package Type: PLCC
• Operating Supply Voltage (max): 5.5V
• Mounting: Surface Mount
• Pin Count: 44
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935270053512; SC16C750IA44; SC16C750IA44

Philips Semiconductors
9397 750 11623
Product data
7.10 Enhanced Feature Register (EFR)
7.9 Scratchpad Register (SPR)
Table 20:
[1]
The SC16C750 provides a temporary data register to store 8 bits of user information.
Enhanced features are enabled or disabled using this register.
Table 21:
Bit
1
0
Bit
7
6
5-0
Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated.
Symbol
EFR[7]
EFR[6]
EFR[5-0] Reserved; set to 0.
Symbol
MSR[1]
MSR[0]
Modem Status Register bits description
Enhanced Feature Register bits description
Description
Automatic CTS flow control.
Automatic RTS flow control. Automatic RTS may be used for hardware flow
control by enabling EFR[6]. When Auto-RTS is selected, an interrupt will
be generated when the receive FIFO is filled to the programmed trigger
level and RTS will go to a logic 1 at the next trigger level. RTS will return to
a logic 0 when data is unloaded below the next lower trigger level
(programmed trigger level 1). The state of this register bit changes with the
status of the hardware flow control. RTS functions normally when
hardware flow control is disabled.
Rev. 04 — 20 June 2003
Description
Logic 0 = Automatic CTS flow control is disabled (normal default
condition).
Logic 1 = Enable Automatic CTS flow control. Transmission will stop
when CTS goes to a logical 1. Transmission will resume when the CTS
pin returns to a logical 0.
0 = Automatic RTS flow control is disabled (normal default condition).
1 = Enable Automatic RTS flow control.
DSR
CTS
Logic 0 = No DSR change (normal default condition).
Logic 1 = The DSR input to the SC16C750 has changed state since
the last time it was read. A modem Status Interrupt will be generated.
Logic 0 = No CTS change (normal default condition).
Logic 1 = The CTS input to the
the last time it was read. A modem Status Interrupt will be generated.
[1]
[1]
SC16C750
…continued
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
UART with 64-byte FIFO
has changed state since
SC16C750
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