71M6521DE-IMR/F Maxim Integrated Products, 71M6521DE-IMR/F Datasheet - Page 59
71M6521DE-IMR/F
Manufacturer Part Number
71M6521DE-IMR/F
Description
IC ENERGY METER 16K FLASH 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6521DE-IMRF.pdf
(107 pages)
Specifications of 71M6521DE-IMR/F
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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71M6521DE/DH/FE Data Sheet
The data flow between CE and MPU is shown in Figure 26. In a typical application, the 32-bit compute engine (CE)
sequentially processes the samples from the voltage inputs on pins IA, VA, IB, and VB, performing calculations to
measure active power (Wh), reactive power (VARh), A
are then accessed by the MPU, processed further and output using the peripheral devices available to the MPU.
Figure 27 shows the functional relationship between CE and MPU. The CE is controlled by the MPU via shared
registers in the I/O RAM and by registers in the CE DRAM. The CE outputs two interrupt signals to the MPU:
CE_BUSY and XFER_BUSY, which are connected to the MPU interrupt service inputs as external interrupts.
CE_BUSY indicates that the CE is actively processing data. This signal will occur once every multiplexer cycle.
XFER_BUSY indicates that the CE is updating data to the output region of the CE DRAM. This will occur whenever
the CE has finished generating a sum by completing an accumulation interval determined by SUM_CYCLES *
PRE_SAMPS samples. Interrupts to the MPU occur on the falling edges of the XFER_BUSY and CE_BUSY signals.
Rev 2
Mux Ctrl.
ADC
Samples
I/O RAM (CONFIGURATION RAM)
VAR (DIO7)
SAMPLES
Pulses
Processor
CE
CE
Figure 27: MPU/CE Communication
I/O RAM (Configuration RAM)
Pre-
CE/MPU Communication
Figure 26: MPU/CE Data Flow
PULSES
W (DIO6)
Data Flow
IRQ
Data
INTERRUPTS
SAG CONTROL
2
XFER_BUSY
EXT_PULSE
h, and V
APULSEW
APULSER
CE_BUSY
DATA
Processor
MPU
Post-
2
h for four-quadrant metering. These measurements
MPU
Processed
Metering
Data
LCD segments)
DISPLAY (me-
mory-mapped
(UART0/1)
EEPROM
DIO
SERIAL
(I2C)
Page: 59 of 107
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