71M6531D-IMR/F Maxim Integrated Products, 71M6531D-IMR/F Datasheet - Page 47
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71M6531D-IMR/F
Manufacturer Part Number
71M6531D-IMR/F
Description
IC ENERGY METER 128KB 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet
1.71M6531D-IMRF.pdf
(120 pages)
Specifications of 71M6531D-IMR/F
Mounting Style
SMD/SMT
Package / Case
QFN-68
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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The MPU communicates with the interface through the SFR registers EEDATA and EECTRL. If the MPU
wishes to write a byte of data to the EEPROM, it places the data in EEDATA and then writes the Transmit
code to EECTRL. This initiates the transmit operation which is finished when the BUSY bit falls. INT5 is also
asserted when BUSY falls. The MPU can then check the RX_ACK bit to see if the EEPROM acknowledged
the transmission.
A byte is read by writing the Receive command to EECTRL and waiting for the BUSY bit to fall. Upon
completion, the received data is in EEDATA. The serial transmit and receive clock is 78 kHz during each
transmission and then holds in a high state until the next transmission. The EECTRL bits when the two-pin
interface is selected are shown in
Three-Wire (µ-Wire) EEPROM Interface
A 500 kHz three-wire interface, using SDATA, SCK and a DIO pin for CS is available. The interface is
selected by setting DIO_EEX[1:0] = 2 (b10). The EECTRL bits when the three-wire interface is selected
are shown in
EEPROM or read from the EEPROM, depending on the values of the EECTRL bits.
FDS 6531/6532 005
Two-Pin EEPROM Interface
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is
multiplexed onto the DIO4 (SCK) and DIO5 (SDA) pins and is selected by setting DIO_EEX[1:0] = 01.
v1.3
Status
Bit
3:0
7
6
5
4
directly is discouraged, because it may tie up the MPU to the point where it may become too busy
to process interrupts.
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly. In
this case, a resistor has to be used in series with SDA to avoid data collisions due to limits in the
speed at which the SDA pin can be switched from output to input. Controlling DIO4 and DIO5
The µ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.
ERROR
BUSY
RX_ACK
TX_ACK
CMD[3:0]
Name
Table
48. When EECTRL is written, up to 8 bits from EEDATA are either written to the
Read/
Write
W
© 2005-2010 TERIDIAN Semiconductor Corporation
R
R
R
R
Table 47: EECTRL Bits for 2-pin Interface
Reset
State
0000
Table
0
0
1
1
47.
Positive
Positive
Negative
Negative
Positive
Polarity
Description
1 when an illegal command is received.
1 when serial data bus is busy.
0 indicates that the EEPROM sent an ACK bit.
0 indicates when an ACK bit has been sent to the
EEPROM.
CMD[3:0]
Others
0000
0010
0011
0101
0110
1001
No-op command. Stops the I
clock (SCK, DIO4). If not issued,
SCK keeps toggling.
Receive a byte from the EEPROM
and send ACK.
Transmit a byte to the EEPROM.
Issue a STOP sequence.
Receive the last byte from the
EEPROM and do not send ACK.
Issue a START sequence.
No operation, set the ERROR bit.
Data Sheet 71M6531D/F-71M6532D/F
Operation
2
C
47
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