EA-XPR-001 Embedded Artists, EA-XPR-001 Datasheet - Page 24

• Manufacturer Part Number: EA-XPR-001
• Description: BOARD LPCXPRESSO LPC1343
• Manufacturer: Embedded Artists
• Series: LPCXpressor
• Type: MCUr

Specifications of EA-XPR-001

• Contents: Board, Software
• For Use With/related Products: EA-XPR-021, ARM Cortex-M3
• For Use With: EA-XPR-021 - BOARD BASE LPCXPRESSO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC1311_13_42_43
Product data sheet
7.17.1.1 Internal RC oscillator
7.17.1.2 System oscillator
7.17.1.3 Watchdog oscillator
7.17.2 System PLL and USB PLL
7.17.3 Clock output
7.17.4 Wake-up process
The IRC may be used as the clock source for the WDT, and/or as the clock that drives the
system PLL and subsequently the CPU. The nominal IRC frequency is 12 MHz. The IRC
is trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up, any chip reset, or wake-up from Deep power-down mode, the
LPC1311/13/42/43 use the IRC as the clock source. Software may later switch to one of
the other available clock sources.
The system oscillator can be used as the clock source for the CPU, with or without using
the PLL. On the LPC134x, the system oscillator must be used to provide the clock source
to USB.
The system oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be
boosted to a higher frequency, up to the maximum CPU operating frequency, by the
system PLL.
The watchdog oscillator can be used as a clock source that directly drives the CPU, the
watchdog timer, or the CLKOUT pin. The watchdog oscillator nominal frequency is
programmable between 7.8 kHz and 1.7 MHz. The frequency spread over processing and
temperature is ±40 % (see also
The LPC134x contain a system PLL and a dedicated PLL for generating the 48 MHz USB
clock. The LPC131x contain the system PLL only. The system and USB PLLs are
identical.
The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz. The input
frequency is multiplied up to a high frequency with a Current Controlled Oscillator (CCO).
The multiplier can be an integer value from 1 to 32. The CCO operates in the range of
156 MHz to 320 MHz, so there is an additional divider in the loop to keep the CCO within
its frequency range while the PLL is providing the desired output frequency. The output
divider may be set to divide by 2, 4, 8, or 16 to produce the output clock. Since the
minimum output divider value is 2, it is insured that the PLL output has a 50 % duty cycle.
The PLL is turned off and bypassed following a chip reset and may be enabled by
software. The program must configure and activate the PLL, wait for the PLL to lock, and
then connect to the PLL as a clock source. The PLL settling time is 100 μs.
The LPC1311/13/42/43 features a clock output function that routes the IRC oscillator, the
system oscillator, the watchdog oscillator, or the main clock to an output pin.
The LPC1311/13/42/43 begin operation at power-up and when awakened from Deep
power-down mode by using the 12 MHz IRC oscillator as the clock source. This allows
chip operation to resume quickly. If the main oscillator or the PLL is needed by the
application, software will need to enable these features and wait for them to stabilize
before they are used as a clock source.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 August 2010
Table
14).
32-bit ARM Cortex-M3 microcontroller
LPC1311/13/42/43
© NXP B.V. 2010. All rights reserved.
24 of 62