AD8302ARU-REEL Analog Devices Inc, AD8302ARU-REEL Datasheet - Page 15

• Manufacturer Part Number: AD8302ARU-REEL
• Description: IC DETECTOR RF/IF 14-TSSOP T/R
• Manufacturer: Analog Devices Inc

Specifications of AD8302ARU-REEL

• Rohs Status: RoHS non-compliant
• Frequency: 2.7GHz
• Rf Type: General Purpose
• Input Range: -60dBm ~ 0dBm
• Accuracy: 0.5dB
• Voltage - Supply: 2.7 V ~ 5.5 V
• Current - Supply: 23mA
• Package / Case: 14-TSSOP (0.173", 4.40mm Width)
• Pin Count: 14
• Screening Level: Industrial
• Package Type: TSSOP
• Lead Free Status / Rohs Status: Not Compliant

GENERAL DESCRIPTION AND THEORY
The AD8302 measures the magnitude ratio, defined here as
gain, and phase difference between two signals. A pair of
matched logarithmic amplifiers provide the measurement, and
their hard-limited outputs drive the phase detector.
Basic Theory
Logarithmic amplifiers (log amps) provide a logarithmic com-
pression function that converts a large range of input signal
levels to a compact decibel-scaled output. The general math-
ematical form is:
where V
and V
that log(x) represents the log10(x) function. V
volts/decade, and since a decade of voltage corresponds to
20 dB, V
signal that results in an output of zero and need not correspond
to a physically realizable part of the log amp signal range.
While the slope is fundamentally a characteristic of the log amp,
the intercept is a function of the input waveform as well.
Furthermore, the intercept is typically more sensitive to tem-
perature and frequency than the slope. When single log amps
are used for power measurement, this variability introduces
errors into the absolute accuracy of the measurement since the
intercept represents a reference level.
The AD8302 takes the difference in the output of two identical
log amps, each driven by signals of similar waveforms but at
different levels. Since subtraction in the logarithmic domain
corresponds to a ratio in the linear domain, the resulting
output becomes:
where V
corresponding to the magnitude of the signal level difference,
and V
out. Unlike the measurement of power, when measuring a dimen-
sionless quantity such as relative signal level, no independent
reference or intercept need be invoked. In essence, one signal
serves as the intercept for the other. Variations in intercept due
to frequency, process, temperature, and supply voltage affect both
channels identically and hence do not affect the difference. This
technique depends on the two log amps being well matched
in slope and intercept to ensure cancellation. This is the case
for an integrated pair of log amps. Note that if the two signals
have different waveforms (e.g., different peak-to-average ratios)
or different frequencies, an intercept difference may appear, intro-
ducing a systematic offset.
The log amp structure consists of a cascade of linear/limiting
gain stages with demodulating detectors. Further details about
the structure and function of log amps can be found in data
sheets for other log amps produced by Analog Devices.
output of the final stage of a log amp is a fully limited signal
over most of the input dynamic range. The limited outputs from
both log amps drive an exclusive-OR style digital phase detector.
Operating strictly on the relative zero-crossings of the limited sig-
nals, the extracted phase difference is independent of the original
input signal levels. The phase output has the general form:
REV. A
NOTES
1
2
See the data sheet for the AD640 for a description of the effect of waveform on
the intercept of log amps.
For example, see the data sheet for the AD8307.
V
V
OUT
SLP
SLP
MAG
IN
INA
is called the slope (voltage). It is assumed throughout
is the slope. Note that the intercept, V
SLP
is the input voltage, V
=
=
and V
V
/20 is the volts/dB. V
V
SLP
SLP
INB
log
log
are the input voltages, V
(
V
(
V
IN
INA
/
V
/
V
Z
)
INB
Z
is called the intercept (voltage),
)
Z
is the value of input
MAG
Z
SLP
, has dropped
is the output
is thus the
2
The
1
(1)
(2)
–15–
where V
relative phase in degrees.
Structure
The general form of the AD8302 is shown in Figure 2. The
major blocks consist of two demodulating log amps, a phase
detector, output amplifiers, a biasing cell, and an output refer-
ence voltage buffer. The log amps and phase detector process
the high frequency signals and deliver the gain and phase infor-
mation in current form to the output amplifiers. The output
amplifiers determine the final gain and phase scaling. External
filter capacitors set the averaging time constants for the respec-
tive outputs. The reference buffer provides a 1.80 V reference
voltage that tracks the internal scaling constants.
Each log amp consists of a cascade of six 10 dB gain stages with
seven associated detectors. The individual gain stages have 3 dB
bandwidths in excess of 5 GHz. The signal path is fully differen-
tial to minimize the effect of common-mode signals and noise.
Since there is a total of 60 dB of cascaded gain, slight dc offsets
can cause limiting of the latter stages, which may cause mea-
surement errors for small signals. This is corrected by a feedback
loop. The nominal high-pass corner frequency, f
is set internally at 200 MHz but can be lowered by adding external
capacitance to the OFSA and OFSB pins. Signals at frequencies
well below the high-pass corner are indistinguishable from dc
offsets and are also nulled. The difference in the log amp out-
puts is performed in the current domain, yielding by analogy to
Equation 2:
where I
characteristic slope (current) of the log amps, respectively. The
slope is derived from an accurate reference designed to be insen-
sitive to temperature and supply voltage.
The phase detector uses a fully symmetric structure with respect
to its two inputs to maintain balanced delays along both signal
paths. Fully differential signaling again minimizes the sensitivity
to common-mode perturbations. The current-mode equivalent
to Equation 3 is:
where I
associated with the phase detector, respectively. The slope is
derived from the same reference as the log amp slope.
COMM
OFSA
OFSB
VPOS
INPA
INPB
V
I
I
PHS
LA
PD
PD
LA
Φ
=
=
is the phase slope in mV/degree and Φ is each signal’s
and I
=
and I
I
I
SLP
V
BIAS
Φ
Φ
[
VIDEO OUTPUT – A
VIDEO OUTPUT – B
Φ
[
Φ
60dB LOG AMPS
60dB LOG AMPS
log
SLP
Φ
(7 DETECTORS)
(7 DETECTORS)
Figure 2. General Structure
(
are the output current and characteristic slope
V
(
V
(
INA
V
are the output current difference and the
INA
DETECTOR
INA
)
)
PHASE
−
−
/
Φ
V
Φ
INB
(
V
(
V
INB
INB
)
+
)
)
−
]
90
–
+
+
°
]
–
–
AD8302
HP
x3
, of this loop
1.8V
MFLT
VMAG
MSET
PSET
VPHS
PFLT
VREF
(3)
(4)
(5)