AD8302ARU-REEL Analog Devices Inc, AD8302ARU-REEL Datasheet - Page 18

IC DETECTOR RF/IF 14-TSSOP T/R

AD8302ARU-REEL

Manufacturer Part Number
AD8302ARU-REEL
Description
IC DETECTOR RF/IF 14-TSSOP T/R
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8302ARU-REEL

Rohs Status
RoHS non-compliant
Frequency
2.7GHz
Rf Type
General Purpose
Input Range
-60dBm ~ 0dBm
Accuracy
0.5dB
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
23mA
Package / Case
14-TSSOP (0.173", 4.40mm Width)
Pin Count
14
Screening Level
Industrial
Package Type
TSSOP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8302ARU-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD8302
Cross Modulation of Magnitude and Phase
At high frequencies, unintentional cross coupling between signals
in Channels A and B inevitably occurs due to on-chip and board-
level parasitics. When the two signals presented to the AD8302
inputs are at very different levels, the cross coupling introduces
cross modulation of the phase and magnitude responses. If the two
signals are held at the same relative levels and the phase between
them is modulated then only the phase output should respond.
Due to phase-to-amplitude cross modulation, the magnitude out-
put shows a residual response. A similar effect occurs when the
relative phase is held constant while the magnitude difference is
modulated, i.e., an expected magnitude response and a residual
phase response are observed due to amplitude-to-phase cross
modulation. The point where these effects are noticeable depends
on the signal frequency and the magnitude of the difference. Typi-
cally, for differences <20 dB, the effects of cross modulation are
negligible at 900 MHz.
Modifying the Slope and Center Point
The default slope and center point values can be modified with
the addition of external resistors. Since the output interface
blocks are generalized for both magnitude and phase functions,
the scaling modification techniques are equally valid for both
outputs. Figure 8 demonstrates how a simple voltage divider
from the VMAG and VPHS pins to the MSET and PSET pins
can be used to modify the slope. The increase in slope is given by
1 + R1/(R2 20 kΩ). Note that it may be necessary to account for
the MSET and PSET input impedance of 20 kΩ which has a ±20%
manufacturing tolerance. As is generally true in such feedback
systems, envelope bandwidth is decreased and the output noise
transferred from the input is increased by the same factor. For
example, by selecting R1 and R2 to be 10 kΩ and 20 kΩ,
respectively, gain slope increases from the nominal 30 mV/dB
by a factor of 2 to 60 mV/dB. The range is reduced by a factor
of 2 and the new center point is at –15 dB, i.e., the range now
extends from –30 dB, corresponding to V
corresponding to V
Figure 8. Increasing the Slope Requires the Inclusion of a
Voltage Divider
Repositioning the center point back to its original value of 0 dB
simply requires that an appropriate voltage be applied to the
grounded side of the lower resistor in the voltage divider. This
voltage may be provided externally or derived from the internal
reference voltage on pin VREF. For the specific choice of R2 =
20 kΩ, the center point is easily readjusted to 0 dB by connecting
the VREF pin directly to the lower pin of R2 as shown in Figure 9.
The increase in slope is now simplified to 1 + R1/10 kΩ. Since this
1.80 V reference voltage is derived from the same band gap
20k
VMAG
MSET
MAG
R1
R2
= 1.8 V.
NEW SLOPE = 30mV/dB
MAG
= 0 V, to 0 dB,
1
R2
||
R20k
R1
–18–
reference that determines the nominal center point, their
tracking with temperature, supply, and part-to-part variations
should be better in comparison to a fixed external voltage. If the
center point is shifted to 0 dB in the previous example where
the slope was doubled, then the range spans from –15 dB at
V
Figure 9. The Center Point Is Repositioned with the Help
of the Internal Reference Voltage of 1.80 V
Comparator and Controller Modes
The AD8302 can also operate in a comparator mode if used in
the arrangement shown in Figure 10 where the DUT is the element
to be evaluated. The VMAG and VPHS pins are no longer
connected to MSET and PSET. The trip-point thresholds for the
gain and phase difference comparison are determined by the
voltages applied to pins MSET and PSET according to:
where Gain
phase thresholds. If the actual gain and phase between the two
input channels differ from these thresholds, the V
outputs toggle like comparators, i.e.,
Figure 10. Disconnecting the Feedback to the Setpoint
Controls, the AD8302 Operates in Comparator Mode
MAG
V
V
V
V
MAG
PHS
MSET
PSET
= 0 V to 15 dB at V
=
V
V
( )
=
( )
INA
INB
V
V
SP
= −
=
20k
(dB) and Phase
1 8
1 8
0
0
30
R1
R2
10
. V if Gain Gain
. V if Phase
VMAG
MSET
V if Gain Gain
V if Phase
C7
VREF
mV dB Gain
mV
C1
C4
C6
C5
C3
/
/
VP
° ×
R4
×
MAG
NEW SLOPE = 30mV/dB
(
|
R1
20k
<
1
2
3
4
5
6
7
Phase
<
>
SP
COMM
INPA
OFSA
VPOS
OFSB
INPB
COMM
>
Phase
= 1.8 V.
(°) are the desired gain and
Phase
AD8302
SP
SP
SP
(
dB
( )|–
SP
SP
°
VMAG
SP
MSET
MFLT
VREF
VPHS
PSET
PFLT
)
+
90
900
14
13
12
11
10
9
8
°
)
+
mV
1
900
V
V
V
V
C8
MAG
MSET
PSET
PHS
10k
MAG
R1
mV
and V
C2
REV. A
PHS
(11)
(12)
(13)
(14)

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