ATA5577M2250C-DBN Atmel, ATA5577M2250C-DBN Datasheet - Page 3
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ATA5577M2250C-DBN
Manufacturer Part Number
ATA5577M2250C-DBN
Description
IC RFID R/W BUMP WAFER
Manufacturer
Atmel
Datasheet
1.ATA5577M1250C-DDB.pdf
(8 pages)
Specifications of ATA5577M2250C-DBN
Function
Read/Write
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4967DS–RFID–10/08
Analog Front End (AFE)
Data-rate Generator
Write Decoder
HV Generator
DC Supply
Power-On Reset (POR)
Clock Extraction
Controller
The AFE includes all circuits that are directly connected to the coil terminals. It generates the
IC's power supply and handles the bi-directional data communication with the reader. It consists
of the following blocks:
The data rate is binary programmable to operate at any even-numbered data rate between RF/2
and RF/128 or to any of the fixed Basic mode data rates (RF/8, RF/16, RF/32, RF/40, RF/50,
RF/64, RF/100 and RF/128).
The write decoder detects the write gaps and verifies the validity of the data stream according to
the Atmel e555x downlink protocol (pulse interval encoding).
This on-chip charge pump circuit generates the high voltage required to program the EEPROM.
Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and regu-
lates this RF source and uses it to generate its supply voltage.
The power-on reset circuit blocks the voltage supply to the IDIC until an acceptable voltage
threshold has been reached.
The clock extraction circuit uses the external RF signal as its internal clock source.
The control logic module executes the following functions:
• Rectifier to generate a DC supply voltage from the AC coil voltage
• Clock extractor
• Switchable load between Coil 1 and Coil 2 for data transmission from the tag to the reader
• Field-gap detector for data transmission from the base station to the tag
• ESD-protection circuitry
• Load mode register with configuration data from EEPROM block 0 after power-on and during
• Load option register with the settings for the analog front end stored in EEPROM page 1
• Control all EEPROM memory read/write access and data protection
• Handles the downlink command decoding detecting protocol violations and error conditions
reading
block 3 after power-on and during reading
ATA5577
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