MCP2030-I/P Microchip Technology, MCP2030-I/P Datasheet - Page 32

IC KEYLESS ENTRY AFE 14DIP

MCP2030-I/P

Manufacturer Part Number
MCP2030-I/P
Description
IC KEYLESS ENTRY AFE 14DIP
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP2030-I/P

Rf Type
ISM
Frequency
125kHz
Features
10kbps
Package / Case
14-DIP (0.300", 7.62mm)
Ic Function
Analog Front End Device IC
Supply Voltage Range
2V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
DIP
No. Of Pins
14
Supply Voltage
2V
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP2030-I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
MCP2030
5.7
FGA1 and FGA2 provides a maximum two-stage gain
of 40 dB.
5.8
The auto-channel selection feature is enabled if the
Auto-Channel Select bit AUTOCHSEL<8> in Configu-
ration Register 5 (Register 5-6) is set, and disabled if
the bit is cleared. When this feature is active (i.e.,
AUTOCHSE <8> = 1), the control circuit checks the
demodulator output of each input channel immediately
after the AGC settling time (T
it allows this channel to pass data, otherwise it is
blocked.
The status of this operation is monitored by STATUS
Register 7 bits <8:6> (Register 5-8). These bits indicate
the current status of the channel selection activity, and
automatically updates for every Soft Reset period. The
auto-channel selection function resets after each Soft
Reset (or after Inactivity timer time-out). Therefore, the
blocked channels are re-enabled after Soft Reset.
This feature can make the output signal cleaner by
blocking any channel that was not high at the end of
T
output, and is not applied for carrier clock or RSSI
output.
5.9
The Carrier Clock Detector senses the input carrier
cycles. The output of the detector switches digitally at
the signal carrier frequency. Carrier clock output is
available when the output is selected by the DATOUT
bit in Configuration Register 1 (Register 5-2).
DS21981A-page 32
AGC
Note:
. This function works only for demodulated data
Fixed Gain Amplifiers 1 and 2
Auto-Channel Selection
Carrier Clock Detector
The user cannot control the gain of these
two amplifiers.
STAB
). If the output is high,
5.10
The Demodulator consists of a full-wave rectifier, low
pass filter, peak detector and Data Slicer that detects
the envelope of the input signal.
5.11
The Data Slicer consists of a reference generator and
comparator. The Data Slicer compares the input with
the reference voltage. The reference voltage comes
from the minimum modulation depth requirement
setting and input peak voltage. The data from all 3
channels are OR’d together and sent to the output
enable filter.
5.12
The Output Enable Filter enables the LFDATA output
once the incoming signal meets the wake-up sequence
requirements
Output Enable Filter”).
5.13
The RSSI provides a current which is proportional to
the input signal amplitude (see Section 5.30.3
“Received
Output”).
5.14
The device has an internal 32 kHz RC oscillator. The
oscillator is used in several timers:
• Inactivity timer
• Alarm timer
• Pulse width timer
• Period timer
• AGC settling timer
5.14.1
The RC oscillator generates a 32 kHz internal clock.
Demodulator
Data Slicer
Output Enable Filter
Received Signal Strength
Indicator (RSSI)
Analog Front-End Timers
RC OSCILLATOR
Signal
(see
Section 5.15
Strength
© 2005 Microchip Technology Inc.
Indicator
“Configurable
(RSSI)

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