MCP2030-I/P Microchip Technology, MCP2030-I/P Datasheet - Page 36
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MCP2030-I/P
Manufacturer Part Number
MCP2030-I/P
Description
IC KEYLESS ENTRY AFE 14DIP
Manufacturer
Microchip Technology
Datasheet
1.MCP2030-ISL.pdf
(66 pages)
Specifications of MCP2030-I/P
Rf Type
ISM
Frequency
125kHz
Features
10kbps
Package / Case
14-DIP (0.300", 7.62mm)
Ic Function
Analog Front End Device IC
Supply Voltage Range
2V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
DIP
No. Of Pins
14
Supply Voltage
2V
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP2030-I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
MCP2030
5.15
Configurable Output Enable Filter
The purpose of this filter is to enable the LFDATA out-
put and wake the external microcontroller only after
receiving a specific sequence of pulses on the LC input
pins. Therefore, it prevents waking up the external
microcontroller due to noise or unwanted input signals.
The circuit compares the timing of the demodulated
header waveform with a pre-defined value, and
enables the demodulated LFDATA output when a
match occurs.
The output enable filter consists of a high (T
) and
OEH
low duration (T
) of a pulse immediately after the
OEL
AGC settling gap time. The selection of high and low
times further implies a max period time. The output
enable high and low times are determined by SPI
programming. Figure 5-3 and Figure 5-4 show the
output enable filter waveforms.
There should be no missing cycles during T
.
OEH
Missing cycles may result in failing the output enable
condition.
Start bit
Required Output Enable Sequence
Data Packet
T
STAB
(T
+ T
)
AGC
PAGC
Demodulator
T
GAP
Output
t
T
t
T
OEH
OEL
Device Wake-up
AGC
and AGC Stabilization
Gap Pulse
LFDATA output is enabled
t
T
OET
on this rising edge
FIGURE 5-3:
Output Enable Filter Timing.
© 2005 Microchip Technology Inc.
DS21981A-page 36