ISL5239KIZ Intersil, ISL5239KIZ Datasheet - Page 24

IC LINEARIZER PRE-DISTORT 196BGA

ISL5239KIZ

Manufacturer Part Number
ISL5239KIZ
Description
IC LINEARIZER PRE-DISTORT 196BGA
Manufacturer
Intersil
Datasheet

Specifications of ISL5239KIZ

Function
Pre-Distortion Linearizer
Rf Type
CDMA2000, UMTS
Secondary Attributes
Sample Rates to 125MSPS
Package / Case
196-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL5239KIZ
Manufacturer:
INTERSIL
Quantity:
20 000
15:14
13:12
15:14
13:12
15:0
10:0
15:3
BIT
15:0
BIT
BIT
BIT
BIT
9:0
10
2
1
0
Memory Data <15:0>
Memory Data <31:16>
Reserved
Input Capture Status
Input Trigger Position
Reserved
Feedback Capture Status Read only register with status defined as:
Reserved
Feedback Trigger
Position
Reserved
Test
Bypass
Reset
FUNCTION
FUNCTION
FUNCTION
FUNCTION
FUNCTION
24
Lower 16 bits of capture memory data word.
Read only register which records memory location of input trigger point. 2
Selects use of test inputs
Software generated logic reset, which when high, resets the pre-distorter circuitry. Low is default.
Higher 16 bits of capture memory data word. Writing to this address triggers the write to the memory and
increments the address counter when address auto increment, control word 0x04, bit 13 is set. Must write
control word 0x0c first, to load the data values into memory.
Not used.
Read only register with status defined as:
00 - Idle, Memory access OK.
01 - Armed. Capture memory waiting for trigger.
10 - Loading. Capture memory in load mode.
11 - Send. Memory sends data to downstream modules.
Not used.
00 - Idle, Memory access OK.
01 - Armed. Capture memory waiting for trigger.
10 - Loading. Capture memory in load mode.
Not used.
Read only register which records memory location of feedback trigger point. 2
Not used.
0 - Off. IIN<17:0>, QIN<17:0> in use for input stream.
1 - On. Use capture memory output for pre-Distorter input. Note: Test inputs are 16-bits wide and are MSB
justified onto the pre-distorter 20-bit inputs by setting the four LSB’s to zero.
Disables processing and allows input data to flow to output without any pre-distorter modification.
0 - Pre-distorter is active and processing.
1 - Pre-distorter is bypassed.
TYPE: CAPTURE MEMORY, ADDRESS: 0x0c
TYPE: CAPTURE MEMORY, ADDRESS: 0x0d
TYPE: CAPTURE MEMORY, ADDRESS: 0x0e
TYPE: CAPTURE MEMORY, ADDRESS: 0x0f
TABLE 18. FEEDBACK MEMORY STATUS
TYPE: PRE-DISTORTER, ADDRESS: 0x10
TABLE 17. INPUT MEMORY STATUS
TABLE 16. MEMORY DATA MSW
TABLE 15. MEMORY DATA LSW
TABLE 19. CONTROL
ISL5239
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
0
to 2
0
11
to 2
(0...2047).
10
(0...1023).

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