MLX71120KLQ Melexis Inc, MLX71120KLQ Datasheet

RCVR FSK/FM/ASK 32-QFN

MLX71120KLQ

Manufacturer Part Number
MLX71120KLQ
Description
RCVR FSK/FM/ASK 32-QFN
Manufacturer
Melexis Inc
Datasheet

Specifications of MLX71120KLQ

Frequency
300MHz ~ 930MHz
Sensitivity
-108dBm
Data Rate - Maximum
100 kbps
Modulation Or Protocol
ASK, FM, FSK
Applications
General Remote Control, Garage Opener, RKE
Current - Receiving
8.1mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2.1 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Other names
MLX71120A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MLX71120KLQ-AAA-000-RE
Manufacturer:
MELEXIS
Quantity:
3 000
Part Number:
MLX71120KLQ-AAA-000-RE
Manufacturer:
MELEXIS/迈来芯
Quantity:
20 000
Part Number:
MLX71120KLQ-AAA-000-TU
Manufacturer:
MOT
Quantity:
314
Features
Ordering Information
Application Examples
General Description
The MLX71120 is a multi-band, single-channel/dual-channel RF receiver based on a double-conversion
super-heterodyne architecture. It can receive FSK and ASK modulated signals. The IC is designed for gen-
eral purpose applications for example in the European bands at 433MHz and 868MHz or for similar applica-
tions in North America or Asia, e.g. at 315MHz or 915MHz. It is also well-suited for narrow-band applications
according to the ARIB STD-T67 standard in the frequency range 426MHz to 470MHz.
The receiver’s extended temperature and supply voltage ranges make the device a perfect fit for automotive
or similar applications where harsh environmental conditions are expected.
39010 71120
Rev. 006
Part Number
MLX71120
Dual RF input for antenna space and frequency diversity, LNA cascading or differential feeding
Fully integrated PLL-based synthesizer
2
Reception of ASK or FSK modulated signals
Wide operating voltage and temperature ranges
Very low standby current consumption
Low operating current consumption
External IF filters 455kHz or 10.7MHz
Internal FSK demodulator
Average or peak detection data slicer mode
RSSI output with high dynamic range for RF level indication
Output noise cancellation filter
MCU clock output
High over-all frequency accuracy
32-pin Quad Flat No-Lead Package (QFN)
General digital and analog RF receivers
at 300 to 930MHz
Tire pressure monitoring systems (TPMS)
Remote keyless entry (RKE)
Low power telemetry systems
Alarm and security systems
Active RFID tags
Remote controls
Garage door openers
Home and building automation
nd
mixer with image rejection
Temperature Code
K (-40 °C to 125 °C)
Page 1 of 30
Package Code
LQ (32 L QFN 5x5 Quad)
LNAO2
LNAO1
LNAI2
LNAI1
MIXP
MIXN
VEE
VEE
MLX71120
top
Pin Description
FSK/FM/ASK Receiver
RSSI
CINT
VCC
PDN
PDP
SLC
DFO
DF1
MLX71120
300 to 930MHz
Delivery Form
73 pc/tube
5000 pc/T&R
bottom
Data Sheet
Jun/08

Related parts for MLX71120KLQ

MLX71120KLQ Summary of contents

Page 1

... Quad Flat No-Lead Package (QFN) Ordering Information Part Number Temperature Code MLX71120 K (-40 °C to 125 °C) Application Examples General digital and analog RF receivers at 300 to 930MHz Tire pressure monitoring systems (TPMS) Remote keyless entry (RKE) Low power telemetry systems Alarm and security systems Active RFID tags ...

Page 2

Document Content 1 Theory of Operation ...................................................................................................4 1.1 General ............................................................................................................................. 4 1.2 Technical Data Overview.................................................................................................. 4 1.3 Block Diagram .................................................................................................................. 5 1.4 Operating Modes .............................................................................................................. 6 1.5 LNA Selection ................................................................................................................... 6 1.6 Mixer Section .................................................................................................................... 7 1.7 IF Amplifier ....................................................................................................................... ...

Page 3

Reliability Information .............................................................................................28 8 ESD Precautions ......................................................................................................28 9 Disclaimer .................................................................................................................30 39010 71120 Rev. 006 FSK/FM/ASK Receiver Page MLX71120 300 to 930MHz Data Sheet Jun/08 ...

Page 4

Theory of Operation 1.1 General The MLX71120 receiver architecture is based on a double-conversion super-heterodyne approach. The two LO signals are derived from an on-chip integer-N PLL frequency synthesizer. The PLL reference frequency is derived from a crystal (XTAL). ...

Page 5

Block Diagram VEE 2 LNAI1 LNA1 1 MIX1 LNASEL 32 LO1 LNAI2 LNA2 8 VEE 7 SEQ RFSEL 31 BIAS TEST MLX71120 receiver IC consists of the following building blocks: • ...

Page 6

Operating Modes The receiver offers two operating modes selectable by setting the corresponding logic level at pin ENRX. ENRX 0 1 Note: ENRX is pulled down internally. The receiver’s start-up procedure is controlled by a sequencer circuit. It performs ...

Page 7

Mixer Section The mixer section consists of two mixers. Both are double-balanced mixers. The second mixer is built as an image rejection mixer. The first mixer’s inputs (MIXP and MIXN) are functionally the same. For single-ended drive, the unused ...

Page 8

Reference Oscillator A Colpitts crystal oscillator with integrated functional capacitors is used as the reference oscillator (RO) of the PLL synthesizer. The equivalent input capacitance CRO offered to the crystal at pin ROI is about 18pF. The crystal oscillator ...

Page 9

Baseband Data Path The baseband data path can be divided into a data filter section and a data slicer section. MODSEL DF1 ASK 100k 100k FSK SW1 PKDET+ 100k SLCSEL PKDET _ OA2 The data filter input is either ...

Page 10

Data Filter The data filter is formed by the operational amplifier OA1, two internal 100kΩ resistors and two external ca- pacitors implemented higher frequencies and therefore leads to an increased sensitivity. CF1 DF1 100k ...

Page 11

Averaging Detection Mode The simplest configuration is the averaging or RC inte- gration method. Here an on-chip 100kΩ resistor to- gether with an external slicer capacitor (CSL) are form- ing an RC low-pass filter. This way the threshold voltage ...

Page 12

Data Output and Noise Cancellation Filter The data output pin DTAO delivers the demodulated data signal that can be further processed by a noise cancellation filter (NCF). The NCF can be disabled if pin CINT is connected to VEE. ...

Page 13

Frequency Planning Because of the double conversion architecture that employs two mixers and two IF signals, there are four different combinations for injecting the LO1 and LO2 signals: LO1 high side and LO2 high side: receiving at f LO1 ...

Page 14

Calculation of Frequency Settings The receiver has two predefined receive frequency plans which can be selected by the RFSEL control pin. Depending on the logic level of RFSEL pin the sideband selection of the second mixer and the counter ...

Page 15

Standard Frequency Plans IF2 = 455kHz RFSEL f [MHz] RF 315 0 433.92 868.3 1 915 IF2 = 10.7MHz RFSEL f [MHz] RF 315 0 433.92 868.3 1 915 2.3 433/868MHz Frequency Diversity The receiver’s multi-band functionality can be ...

Page 16

Pin Definitions and Descriptions Pin No. Name I/O Type 3 LNAO1 analog output 1 LNAI1 analog input 2 VEE ground 4 MIXP analog input 5 MIXN analog input 6 LNAO2 analog output 8 LNAI2 analog input 7 VEE ground ...

Page 17

Pin No. Name I/O Type 14 MODSEL CMOS input 15 SLCSEL CMOS input 16 DF2 analog I/O 17 DF1 analog I/O 18 DFO analog output 19 SLC analog input 20 PDP analog output 39010 71120 Rev. 006 Functional Schematic VCC ...

Page 18

Pin No. Name I/O Type 21 PDN analog output 22 VCC supply 23 CINT analog input 24 RSSI analog output 25 ROI analog input 26 TEST CMOS input 27 IFSEL CMOS input 28 CLKO CMOS output 39010 71120 Rev. 006 ...

Page 19

Pin No. Name I/O Type 29 DTAO CMOS output 30 ENRX CMOS input 31 RFSEL CMOS input 32 LNASEL CMOS input 39010 71120 Rev. 006 Functional Schematic VCC VCC DTAO 220 29 VEE VCC VCC ENRX 400 30 VEE VEE ...

Page 20

Technical Data 4.1 Absolute Maximum Ratings Operation beyond absolute maximum ratings may cause permanent damage of the device. Parameter Supply voltage Input voltage Storage temperature Junction temperature Thermal Resistance Power dissipation Electrostatic discharge 4.2 Normal Operating Conditions Parameter Supply ...

Page 21

DC Characteristics all parameters under normal operating conditions, unless otherwise stated; typical values °C and V A Parameter Operating Currents Shutdown current Supply current reference oscillator Supply current, FSK IF2= 455kHz Supply current, FSK IF2= ...

Page 22

AC System Characteristics all parameters under normal operating conditions, unless otherwise stated; typical values °C and V A Parameter Receive Characteristics Input Sensitivity 1) 315MHz 433MHz FSK 868MHz 915MHz wide band 180kHz BW 315MHz 433MHz ...

Page 23

Parameter LNA Parameters Voltage gain Mixer Section Parameters Mixer output impedance Voltage conversion gain rd Input referred 3 order intercept point IF Amplifier / RSSI Operating frequency RSSI dynamic range RSSI slope FSK Demodulator Input frequency range Carrier acceptance range ...

Page 24

External Components Parameter Crystal Parameters Crystal frequency Load capacitance Static capacitance Series resistance Noise Cancellation Filter Integrator capacitor Clock Output Pull-up resistor Load capacitance 39010 71120 Rev. 006 Symbol Condition f fundamental mode ...

Page 25

Test Circuit 5.1 Dual-Channel Application Circuit • for antenna-diversity applications L1 L2 CB3 C4 L3 Fig. 10: Dual-channel circuit schematic, peak detectors activated 39010 71120 Rev. 006 FSK ASK VCC output C3 1 RSSI LNAI1 2 CINT VEE 3 ...

Page 26

Test Circuit Component List of Figures 10 Value @ Value @ Part Size 315 MHz 433.92 MHz C3 0603 100 pF 100 pF C4 0603 4 0603 100 pF 100 pF C6 0603 100 pF ...

Page 27

Package Description The device MLX71120 is RoHS compliant The “exposed pad” is not connected to internal ground, all Dimension min 4.75 4.75 max 5.25 5.25 all Dimension in inch min 0.187 ...

Page 28

Reliability Information This Melexis device is classified and qualified regarding soldering technology, solderability and moisture sensitivity level, as defined in this specification, according to following test methods: Reflow Soldering SMD’s (Surface Mount Devices) • IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification ...

Page 29

Your Notes 39010 71120 Rev. 006 FSK/FM/ASK Receiver Page MLX71120 300 to 930MHz Data Sheet Jun/08 ...

Page 30

Disclaimer 1) The information included in this documentation is subject to Melexis intellectual and other property rights. Reproduction of information is permissible only if the information will not be altered and is accom- panied by all associated conditions, limitations ...

Related keywords