TDA5220 Infineon Technologies, TDA5220 Datasheet - Page 25

• Manufacturer Part Number: TDA5220
• Description: RECEIVER SHR FSK/ASK SGL TSSOP28
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5220

• Package / Case: 28-TSSOP
• Frequency: 810MHz ~ 870MHz, 400MHz ~ 440MHz
• Sensitivity: -110dBm
• Data Rate - Maximum: 100 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, Remote Control Systems
• Current - Receiving: 5.9mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 870 MHz
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature (min): -40C
• Operating Temperature (max): 125C
• Operating Temperature Classification: Automotive
• Product Depth (mm): 4.4mm
• Product Length (mm): 9.7mm
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SP000014342; TDA5220; TDA5220INTR; TDA5220XT

Figure 8
3.6
The TDA5220 is containing an ASK/FSK switch which can be controlled via Pin 15
(MSEL). This switch is actually consisting of 2 operational amplifiers that are having a
gain of 1 in case of the ASK amplifier and a gain of 11 in case of the FSK amplifier in
order to achieve an appropriate demodulation gain characteristic. In order to
compensate for the DC-offset generated especially in case of the FSK PLL demodulator
there is a feedback connection between the threshold voltage of the bit slicer comparator
(Pin 20) to the negative input of the FSK switch amplifier.
In ASK-mode alternatively to the voltage at Pin 20 (SLN) a value of approx. 87% of the
peak-detector output-voltage at Pin 26 (PDO) can be used as the slicer-reference level.
The slicing reference level is generated by an internal voltage divider (R
which is applied on the peak detector output.
The selection between these modes is controlled by Pin 16 (SSEL), as described in
Section 3.5.
This is shown in the following Figure 9.
Preliminary Specification
ASK/FSK-Data Path Functional Description
Data Slicer Threshold Generation Utilising the Peak Detector
peak detector
Pins:
26
C
56k
25
U
threshold
390k
data slicer
CP
25
V 1.1, 2004-10-20
Applications
TDA 5220
T1int
, R
T2int
),