TDA5221 Infineon Technologies, TDA5221 Datasheet - Page 15

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TDA5221

Manufacturer Part Number
TDA5221
Description
RECEIVER SHR FSK/ASK SGL TSSOP28
Manufacturer
Infineon Technologies
Type
Receiverr
Datasheet

Specifications of TDA5221

Package / Case
28-TSSOP
Frequency
300MHz ~ 340MHz
Sensitivity
-113dBm
Data Rate - Maximum
100 kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Current - Receiving
6.2mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Operating Frequency
340 MHz
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000014343
TDA5221
TDA5221INTR
TDA5221XT

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2.3
Figure 2
2.4
2.4.1
The LNA is an on-chip cascode amplifier with a voltage gain of 15 to 20dB. The gain
figure is determined by the external matching networks situated ahead of LNA and
between the LNA output LNO (Pin 6) and the Mixer Inputs MI and MIX (Pins 8 and 9).
The noise figure of the LNA is approximately 3dB, the current consumption is 500µA.
The gain can be reduced by approximately 18dB. The switching point of this AGC action
can be determined externally by applying a threshold voltage at the THRES pin (Pin 23).
This voltage is compared internally with the received signal (RSSI) level generated by
the limiter circuitry. In case that the RSSI level is higher than the threshold voltage the
LNA gain is reduced and vice versa. The threshold voltage can be generated by
attaching a voltage divider between the 3VOUT pin (Pin 24) which provides a
temperature stable 3V output generated from the internal bandgap voltage and the
THRES pin as described in Section 3.1. The time constant of the AGC action can be
determined by connecting a capacitor to the TAGC pin (Pin 4) and should be chosen
along with the appropriate threshold voltage according to the intended operating case
and interference scenario to be expected during operation. The optimum choice of AGC
time constant and the threshold voltage is described in Section 3.1.
Preliminary Specification
RF
TAGC
DGND
VCC
Functional Block Diagram
Functional Block Description
Low Noise Amplifier (LNA)
LNI
Block Diagram
14
13
3
4
VCC
LNA
2,7
AGND
LNO
5,10
VCC
6
MI
: 2
8
MIX
TDA 5221
9
12
IFO
VCO
Loop
Filter
OTA
Filter
IF
LIM
: 128
: 129
FSEL
17
11
LIMX
18
LIMITER
DET
15
PLL Demod
FSK
: 2
MSEL
15
CRYSTAL
H=ASK
L=FSK
1
OSC
Crystal
+
+
-
-
ASK
FSK
28
FFB
Functional Description
22
OPP
21
+
-
OP
U
SLP
REF
19
V 1.1, 2004-10-20
Reference
Reference
Bandgap
PDWN
AGC
SLN
20
+ CM
-
+
-
27
SLICER
DATA-
DETECTOR
CP
TDA 5221
PEAK
Logic
26
16
24
25
23
SSEL
DATA
PDO
3VOUT
THRES

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