TEF6607T/V5,518 NXP Semiconductors, TEF6607T/V5,518 Datasheet - Page 19

• Manufacturer Part Number: TEF6607T/V5,518
• Description: IC TUNER CAR RADIO AM/FM 32SOIC
• Manufacturer: NXP Semiconductors

Specifications of TEF6607T/V5,518

• Frequency: *
• Sensitivity: *
• Data Rate - Maximum: *
• Modulation Or Protocol: *
• Applications: *
• Current - Receiving: *
• Data Interface: *
• Memory Size: *
• Antenna Connector: *
• Features: *
• Voltage - Supply: *
• Operating Temperature: *
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935288264518

NXP Semiconductors
LPC3152_3154
Preliminary data sheet
6.5 Multi-Port Memory Controller (MPMC)
The multi-port memory controller supports the interface to different memory types, for
example:
This module has the following features:
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– Interrupts generated after completion of error correction task with three interrupt
– Error correction statistics distributed to ARM using interrupt scheme.
– Interface is compatible with the ARM External Bus Interface (EBI).
SDRAM
Low-power SDRAM
Static memory interface
Dynamic memory interface support including SDRAM, JEDEC low-power SDRAM.
Address line supporting up to 128 MB (two 64Mx8 devices connected to a single chip
select) of dynamic memory.
The MPMC has two AHB interfaces:
a. an interface for accessing external memory.
b. a separate control interface to program the MPMC. This enables the MPMC
Low transaction latency.
Read and write buffers to reduce latency and to improve performance, particularly for
un-cached processors.
Static memory features include:
– asynchronous page mode read
– programmable wait states
– bus turnaround delay
– output enable, and write enable delays
– extended wait
One chip select for synchronous memory and two chip selects for static memory
devices.
Power-saving modes.
Dynamic memory self-refresh mode supported.
Controller support for 2 k, 4 k, and 8 k row address synchronous memory parts.
Support for all AHB burst types.
Little and big-endian support.
Support for the External Bus Interface (EBI) that enables the memory controller pads
to be shared.
registers.
registers to be situated in memory with other system peripheral registers.
All information provided in this document is subject to legal disclaimers.
Rev. 0.12 — 27 May 2010
LPC3152/3154
© NXP B.V. 2010. All rights reserved.
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