TEF6730AHW/V1S,518 NXP Semiconductors, TEF6730AHW/V1S,518 Datasheet - Page 16
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TEF6730AHW/V1S,518
Manufacturer Part Number
TEF6730AHW/V1S,518
Description
IC FRONT END DGTL CAR RAD 64LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.TEF6730AHWV1S518.pdf
(58 pages)
Specifications of TEF6730AHW/V1S,518
Modulation Or Protocol
AM, FM, WB
Applications
AM/FM Radio Receiver
Current - Receiving
85.3mA, 114.7mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
8 V ~ 9 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Frequency
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935288827518
NXP Semiconductors
TEF6730A_1
Product data sheet
8.2.1 Mode and subaddress byte for write
Table 11.
Table 12.
Table 13.
[1]
[2]
[3]
[4]
Bit
7 to 5
4
3 to 0
MODE2 MODE1 MODE0 Symbol
0
0
0
0
1
1
1
1
MODE2
When the write transmission of a state machine command starts during a mute state of the state machine,
the sequences of the state machine start immediately with the actions which follow the mute period in the
standard sequence (see
References to mute are only used for better understanding. Muting is performed in the IF DSP controlled by
the tuner AFHOLD and AFSAMPLE lines.
In the modes preset and search the AM AGC time constant is set to fast during the period of complete
mute.
The AF update sequence can also be started by pulling the AFHOLD pin LOW. In this case the AF
information should be loaded into the BUFFER before. LOW period for a correct AF update timing:
t
delay of
LOW
7
> 20 s. Between the end of the I
0
0
1
1
0
0
1
1
Symbol
MODE[2:0]
REGC
SA[3:0]
MSA - mode and subaddress byte bit allocation
MSA - mode and subaddress byte bit description
Tuning action modes
20 s is necessary.
MODE1
6
0
1
0
1
0
1
0
1
Rev. 01 — 21 February 2007
Figure
MODE0
Description
mode; see
register mode
subaddress; write data byte subaddress 0 to 15. The subaddress
value is auto-incremented and will revert from SA = 15 to SA = 0. The
auto-increment function cannot be switched off.
5
0 = buffer mode or back mode: previous tuning data is default for
new I
before I
1 = control mode or current mode: current tuning data is default for
new I
register data before I
buffer
preset
search
AF update
jump
check
load
end
9,
[1]
Figure
2
2
C-bus write (data of the BUFFER register is not changed
C-bus write (the BUFFER register is loaded with CONTROL
2
2
C-bus write); see
Table 13
C-bus transmission and the falling edge of the AFHOLD pulse a
REGC
11,
4
Description
write BUFFER register, no state machine action, no
swap
tune to new program with 60 ms mute control; swap
see
tune to new program and stay muted (for release use
end mode); swap
tune to AF program; check AF quality and tune back
to main program; two swap operations
see
tune to AF program in minimum time; swap;
see
tune to AF program and stay muted (for release use
end mode); swap; see
write CONTROL register via BUFFER; no state
machine action; immediate swap; see
Figure 7
end action; release mute; no swap; see
Figure
Figure 8
Figure 12
Figure 14
13,
2
C-bus write); see
SA3
Figure 15
3
Figure 6
[2]
and
and
and
Front-end for digital-IF car radio
[3]
Figure 9
Figure 13
Figure 15
and
; see
SA2
2
Figure 16
Figure
Figure 10
Figure 7
17).
TEF6730A
and
SA1
© NXP B.V. 2007. All rights reserved.
and
1
Figure 17
[4]
Figure 6
Figure 11
Figure 18
;
SA0
and
16 of 58
0
[3]
;