STA5620 STMicroelectronics, STA5620 Datasheet - Page 10

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STA5620

Manufacturer Part Number
STA5620
Description
IC RF FRONT END RECEIVER 32VFQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA5620

Modulation Or Protocol
GPS
Current - Receiving
19mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.5 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VFQFN
Pin Count
32
Screening Level
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Frequency
-
Applications
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Compliant

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Functional description
3.5
3.6
3.7
3.8
10/29
PLL synthesizer and VCO
The PLL synthesizer is fully integrated on-chip, it is made by the voltage controlled oscillator
(VCO), prescaler, dividers, phase-frequency detector (PFD), charge pump (CP) and loop
filter. Both the reference divider R and the feedback divider N are programmable helping the
user to choose the reference clock. The R divider ranges from 1 to 63 while the N divider
from 56 to 4095.
In order to achieve good phase noise performances, a LC voltage controlled oscillator has
been chosen. Quadrature signals are provided by means of a polyphase filter.
A programmable loop filter is integrated on-chip to reduce the number of external
components. The loop stability is guaranteed for any of the supported crystals and
comparison frequencies.
The charge pump is programmable and the output current can be selected among the
following values: 50 µA, 100 µA, 150 µA and 200 µA.
Crystal oscillator
The reference oscillator circuit is a CMOS inverter able to work with external crystals up to
40 MHz. The crystal must be connected between the xtal input and the xtal output pins. The
load capacitances must be chosen in accordance to the values specified by the crystal
manufacturer. A limiting resistor can be placed at the output of the inverter in order to
contain the power dissipated in the crystal within its specified maximum value.
When a TCXO is used the external reference clock must be applied to the XTAL_IN
terminal.
Output buffers
The RF front-end provides a set of four different signals to the baseband chip.
The SIGN and the MAG outputs are the sampled bit streams of the down-converted
received signal.
GPS_CLK, nominally equal to 16.368 MHz, is the clock signal used by the baseband. Its
source can be chosen among the crystal oscillator signal and the VCO signal by means of a
96 divider.
XTAL_CLK is the buffered copy of either the crystal oscillator or the TCXO signal.
In order to let the application find the best compromise between electro-magnetic
interferences and the drivers speed, the output stages slew-rate can be programmed by
SPI.
SPI interface
A SPI interface manages the communication between the baseband chip and the RF front-
end. Four lines are required to accomplish this task: a data input line (SPI_DI), a data output
line (SPI_DO), a clock line (SPI_CLK) and a chip select line (SPI_CS/) active low.
Any information can be passed to the RF receiver through the SPI interface depending on
the CHIP_EN and RF_EN input pins status.
STA5620

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