STA5620 STMicroelectronics, STA5620 Datasheet - Page 21

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STA5620

Manufacturer Part Number
STA5620
Description
IC RF FRONT END RECEIVER 32VFQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA5620

Modulation Or Protocol
GPS
Current - Receiving
19mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.5 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VFQFN
Pin Count
32
Screening Level
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Frequency
-
Applications
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Compliant

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STA5620
8
8.1
Chip enable and reset timing
Figure 5.
Principle of operation
With power supply applied and CHIP_EN inactive the chip is in stand-by mode consuming
just a minimal leakage current (<10 µA). Applying CHIP_EN High turns-on the chip and
starts the Crystal oscillator. Two internal counters driven by the Oscillator output are used to
create two timing periods to:
The default initial configurations depend on the state of the MODE input pin. After this
phase, the chip configuration may be modified by the baseband unit with a set of SPI
commands, allowing a more specific configuration to be set
The first time period (Clock Out Enable) is long enough to safely enable XTAL_CLK as
early as possible by default during oscillator startup.
The second period (Internal reset) generates an internal reset pulse long enough to
guarantee open-loop clock stabilization (driven either by internal oscillator or by off-chip
TCXO) and be able to load the chip default configuration.
VDD Power
CHIP_EN
MODE
Oscillator
Xce (XTAL_CLK enable)
<chip config>
Internal
reset
Chip enable and reset timing
Power -on
MODE
Pin
setting
Clock
Out
Enable
(min 1µs)
Internal reset
(min. 4ms)
Mode = 1
Mode = 0
Chip enable and reset timing
Chip
Config
setting
AC00328
21/29

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