SI4322-A0-FTR Silicon Laboratories Inc, SI4322-A0-FTR Datasheet - Page 3

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SI4322-A0-FTR

Manufacturer Part Number
SI4322-A0-FTR
Description
IC RX FSK UNI 868/915MHZ 16TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4322-A0-FTR

Frequency
868MHz, 915MHz
Sensitivity
-104dBm
Data Rate - Maximum
256 kbps
Modulation Or Protocol
FSK
Applications
Remote Control, RKE, Security Systems
Current - Receiving
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2.2 V ~ 3.8 V
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Memory Size
-
DQD
DQD
AFC
AFC
DQD
DQD
DQD
The Data Quality Detector monitors the I/Q output of the
baseband amplifier chain by counting the consecutive correct 0-
>1, 1->0 transitions. The DQD output indicates the quality of the
signal to be demodulated. Using this method it is possible to
"forecast" the probability of BER degradation. The programmable
DQD parameter defines the threshold for signaling the good/
bad data quality by the digital one-bit DQD output. In cases when
the deviation is close to the bitrate, there should be four
transitions during a single one bit period in the I/Q signals. As
the bitrate decreases in comparison to the deviation, more and
more transitions will happen during a bitperiod.
AFC
AFC
AFC
By using an integrated Automatic Frequency Control (AFC)
feature, the receiver can synchronize its local oscillator to the
received signal, allowing the use of:
Crystal Oscillator and Microcontroller Clock Output
The chip has a single-pin crystal oscillator circuit, which provides
a 10 MHz reference signal for the PLL. To reduce external parts
and simplify design, the crystal load capacitor is internal and
programmable. Guidelines for selecting the appropriate crystal
can be found later in this datasheet. The receiver can supply the
clock signal for the microcontroller, so accurate timing is possible
without the need for a second crystal. In normal operation it is
divided from the reference 10 MHz. During sleep mode a low
frequency (typical 32 kHz) output clock signal can be switched
on.
When the microcontroller turns the crystal oscillator off by
clearing the appropriate bit using the Configuration Setting
Command, the chip provides a programmable number (default
is 128) of further clock pulses (“clock tail”) for the microcontroller
to let it go to idle or sleep mode.
Low Battery Voltage Detector
The low battery detector circuit monitors periodically (typ. 8 ms)
the supply voltage and generates an interrupt if it falls below a
programmable threshold level.
• inexpensive, low accuracy crystals
• narrower receiver bandwidth (i.e. increased sensitivity)
• higher data rate
Wake-Up Timer
The wake-up timer has very low current consumption (4 μA max)
and can be programmed from 1 ms to several hours.
It calibrates itself to the crystal oscillator at every startup and
then at every 30 seconds with an accuracy of ±0.5%. When the
crystal oscillator is switched off, the calibration circuit switches
it back on only long enough for a quick calibration (a few
milliseconds) to facilitate accurate wake-up timing. The periodic
autocalibration feature can be turned off.
Event Handling
In order to minimize current consumption, the receiver supports
the sleep mode. Active mode can be initiated by setting the ex or
en bits (in the Configuration Setting or Receiver Setting
Command).
Si4322 generates an interrupt signal on several events (wake-
up timer timeout, low supply voltage detection, on-chip FIFO filled
up). This signal can be used to wake up the microcontroller,
effectively reducing the period the microcontroller has to be
active. The cause of the interrupt can be read out from the
receiver by the microcontroller through the SDO pin.
Interface and Controller
An SPI compatible serial interface lets the user select the
frequency band, center frequency of the synthesizer, and the
bandwidth of the baseband signal path. Division ratio for the
microcontroller clock, wake-up timer period, and low supply
voltage detector threshold are also programmable. Any of these
auxiliary functions can be disabled when not needed. All
parameters are set to default after power-on; the programmed
values are retained during sleep mode. The interface supports
the read-out of a status register, providing detailed information
about the status of the receiver and the received data. It is also
possible to store the received data bits into the 48 bit RX FIFO
register and read them out in a buffered mode. FIFO mode can
be enabled through the SPI compatible interface by setting the
fe bit to 1 in the Output and FIFO Mode Command. During FIFO
read the crystal oscillator must be ON.
Si4322
3

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