SI4322-A0-FT Silicon Laboratories Inc, SI4322-A0-FT Datasheet - Page 10

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SI4322-A0-FT

Manufacturer Part Number
SI4322-A0-FT
Description
IC RX FSK UNI 868/915MHZ 16TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI4322-A0-FT

Package / Case
16-TSSOP
Frequency
868MHz, 915MHz
Sensitivity
-104dBm
Data Rate - Maximum
256 kbps
Modulation Or Protocol
FSK
Applications
Remote Control, RKE, Security Systems
Current - Receiving
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2.2 V ~ 3.8 V
Operating Frequency
433 MHz to 915 MHz
Operating Supply Voltage
2.2 V to 3.8 V
Mounting Style
SMD/SMT
Supply Current
0.5 mA
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK
Product Depth (mm)
4.4mm
Operating Supply Voltage (typ)
2.5/3.3V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4322-A0-FT
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
SI4322-A0-FT
Manufacturer:
SILICONLABS/芯科
Quantity:
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Company:
Part Number:
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Frequency Setting Command
Receiver Setting Command
Bit 7-6 <d1:d0>:
Bit 5-4 <g1:g0>:
Bit 3-1 <r2:r0>:
The RSSI threshold depends on the LNA gain, the real RSSI threshold can be calculated:
Bit 0 <en>:
the low
bit
bit
The 12-bit Frequency Setting Command <f11 : f0>
has the value F. The value F should be in the range
of 96 and 3903. When F is out of range, the
previous value is kept. The synthesizer center
frequency f
f
0
= 8 * 10 MHz * (C + F/4000)
15
15
1
1
14
14
0
1
0
can be calculated as:
Control the threshold of the RSSI detector:
Select the VDI (valid data indicator) signal:
Set the LNA gain:
Enables the whole receiver chain and crystal ocsillator when set. Enable/disable of the wake-up timer and
13
13
1
0
12
12
0
0
battery detector are not affected by this setting.
f11
11
11
0
d1
g1
0
0
1
1
0
0
1
1
f10
10
10
0
d0
g0
0
1
0
1
0
1
0
1
r2
0
0
0
0
1
1
1
1
f9
9
9
0
r1
0
0
1
1
0
0
1
1
f8
8
8
0
Data Quality Detector Output (DQD)
r0
0
1
0
1
0
1
0
1
G
Digital RSSI Out (DRSSI)
LNA
d1
f7
7
7
Clock recovery lock
(dB relative to max. G)
RSSIsetth [dBm]
d0
VDI output
f6
6
6
The constant C is determined
by the selected band as:
RSSI
Always
Band [MHz]
-12
-18
-6
0
-103
868
915
-97
-91
-85
-79
-73
-67
-61
th
g1
f5
5
5
= RSSI
g0
f4
4
4
setth
+ G
r2
f3
3
3
LNA
10
11
C
f2
r1
2
2
f1
r0
1
1
en
f0
0
0
AD57h
C080h
POR
POR
Si4322
10

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