SI4705-C40-GM Silicon Laboratories Inc, SI4705-C40-GM Datasheet - Page 7
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SI4705-C40-GM
Manufacturer Part Number
SI4705-C40-GM
Description
IC RX FM RADIO 64-108MHZ 20UQFN
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI4705-C-EVB.pdf
(36 pages)
Specifications of SI4705-C40-GM
Frequency
64MHz ~ 108MHz
Modulation Or Protocol
FM
Applications
General Purpose
Current - Receiving
19.9mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Package / Case
20-UQFN, 20-µQFN
Pin Count
20
Screening Level
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4705-C40-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Table 5. 2-Wire Control Interface Characteristics
(V
Parameter
SCLK Frequency
SCLK Low Time
SCLK High Time
SCLK Input to SDIO
(START)
SCLK Input to SDIO
(START)
SDIO Input to SCLK
SDIO Input to SCLK
SCLK Input to SDIO
(STOP)
STOP to START Time
SDIO Output Fall Time
SDIO Input, SCLK Rise/Fall Time
SCLK, SDIO Capacitive Loading
Input Filter Pulse Suppression
Notes:
DD
1. When V
2. When selecting 2-wire mode, the user must ensure that a 2-wire start condition (falling edge of SDIO while SCLK is
3. When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high
4. The Si4704/05 delays SDIO by a minimum of 300 ns from the V
5. The maximum t
= 2.7 to 5.5 V, V
high) does not occur within 300 ns before the rising edge of RST.
until after the first start condition.
t
violated as long as all other timing parameters are met.
HD:DAT
specification.
IO
= 0 V, SCLK and SDIO are low impedance.
IO
HD:DAT
= 1.85 to 3.6 V, T
Setup
Hold
Setup
Hold
Setup
has only to be met when f
4, 5
A
= –20 to 85 °C)
Symbol
t
t
t
t
t
HD:STA
SU:DAT
HD:DAT
SU:STO
SU:STA
t
t
t
f
t
f:OUT
HIGH
t
LOW
t
BUF
t
SCL
C
f:IN
r:IN
SP
b
SCL
Test Condition
Rev. 1.0
= 400 kHz. At frequencies below 400 KHz, t
1,2,3
IH
threshold of SCLK to comply with the minimum
20
20
+
+
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
0.1
0.1
—
—
0
0
---------- -
1pF
---------- -
1pF
C
C
b
b
Si4704/05-C40
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
HD:DAT
Max
400
900
250
300
50
50
—
—
—
—
—
—
—
may be
Unit
kHz
pF
µs
µs
µs
µs
ns
ns
µs
µs
ns
ns
ns
7