JN5148-001-X NXP Semiconductors, JN5148-001-X Datasheet - Page 31

IC MCU 802.15.4 32BIT 2.4G 56QFN

JN5148-001-X

Manufacturer Part Number
JN5148-001-X
Description
IC MCU 802.15.4 32BIT 2.4G 56QFN
Manufacturer
NXP Semiconductors
Series
JN5148r
Datasheet

Specifications of JN5148-001-X

Frequency
2.4GHz
Data Rate - Maximum
667kbps
Modulation Or Protocol
802.15.4
Applications
Home/Building Automation, Industrial Control
Power - Output
2.5dBm
Sensitivity
-95dBm
Voltage - Supply
2 V ~ 3.6 V
Current - Receiving
17.5mA
Current - Transmitting
15mA
Data Interface
PCB, Surface Mount
Memory Size
128kB RAM, 128kB ROM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
56-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
616-1049-2
935293999531
JN5148-001-X
provided to indicate successful packet reception. During reception, the modem determines the Link Quality, which is
made available at the end of the reception as part of the requirements of IEEE802.15.4.
8.3.3 Auto Acknowledge
Part of the protocol allows for transmitted frames to be acknowledged by the destination sending an acknowledge
packet within a very short window after the transmitted frame has been received. The JN5148 baseband processor
can automatically construct and send the acknowledgement packet without processor intervention and hence avoid
the protocol software being involved in time-critical processing within the acknowledge sequence. The JN5148
baseband processor can also request an acknowledge for packets being transmitted and handle the reception of
acknowledged packets without processor intervention.
8.3.4 Beacon Generation
In beaconing networks, the baseband processor can automatically generate and send beacon frames; the repetition
rate of the beacons is programmed by the CPU, and the baseband then constructs the beacon contents from data
delivered by the CPU. The baseband processor schedules the beacons and transmits them without CPU
intervention.
8.3.5 Security
The transmission and reception of secured frames using the Advanced Encryption Standard (AES) algorithm is
handled by the security coprocessor and the stack software. The application software must provide the appropriate
encrypt/decrypt keys for the transmission or reception. On transmission, the key can be programmed at the same
time as the rest of the frame data and setup information.
8.4 Security Coprocessor
The security coprocessor is available to the application software to perform encryption/decryption operations. A
hardware implementation of the encryption engine significantly speeds up the processing of the encrypted packets
over a pure software implementation. The AES library for the JN5148 provides operations that utilise the encryption
engine in the device and allow the contents of memory buffers to be transformed. Information such as the type of
security operation to be performed and the encrypt/decrypt key to be used must also be provided.
AES
Processor
Block
AES Encoder
Encrpytion
Interface
Controller
Figure 21: Security Coprocessor Architecture
8.5 Location Awareness
The JN5148 provides the ability for an application to obtain the Time Of Flight (TOF) between two network nodes.
The TOF information is an alternative metric to that of the existing Energy Detect value (RSSI) that has been typically
used for calculating the relative inter-nodal separation, for subsequent use in a location awareness system.
For short ranges RSSI will typically give a better accuracy than TOF, however for distances above 5 to 10 meters
TOF will offer significant improvements in accuracy compared to RSSI. In general, the RSSI error scales with
distance, such that if the distance doubles then the error doubles.
© NXP Laboratories UK 2010
JN-DS-JN5148-001 1v6
31

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