SX1231IMLTRT Semtech, SX1231IMLTRT Datasheet - Page 41

• Manufacturer Part Number: SX1231IMLTRT
• Description: IC 433/868/915MHZ TXRX 24-QFN
• Manufacturer: Semtech

Specifications of SX1231IMLTRT

• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 300kbps
• Modulation Or Protocol: FSK, GFSK, GMSK, MSK, OOK
• Applications: AMR, Home Automation, Security
• Power - Output: 13dBm
• Sensitivity: -118dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 16mA
• Current - Transmitting: 95mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-QFN
• Transmitting Current: 95mA
• Data Rate: 300Kbps
• Rf Ic Case Style: QFN
• No. Of Pins: 24
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Receiving Current: 16mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: SX1231IMLTR

5. Data Processing
5.1. Overview
5.1.1. Block Diagram
Figure below illustrates the SX1231 data processing circuit. Its role is to interface the data to/from the modulator/
demodulator and the uC access points (SPI and DIO pins). It also controls all the configuration registers.
The circuit contains several control blocks which are described in the following paragraphs.
The SX1231 implements several data operation modes, each with their own data path through the data processing section.
Depending on the data operation mode selected, some control blocks are active whilst others remain disabled.
5.1.2. Data Operation Modes
The SX1231 has two different data operation modes selectable by the user:
Each of these data operation modes is described fully in the following sections.
Rev 3 - April 2010
ADVANCED COMMUNICATIONS & SENSING
Continuous mode: each bit transmitted or received is accessed in real time at the DIO2/DATA pin. This mode may be
used if adequate external signal processing is available.
Packet mode (recommended): user only provides/retrieves payload bytes to/from the FIFO. The packet is automatically
built with preamble, Sync word, and optional AES, CRC, and DC-free encoding schemes The reverse operation is
performed in reception. The uC processing overhead is hence significantly reduced compared to Continuous mode.
Depending on the optional features activated (CRC, AES, etc) the maximum payload length is limited to FIFO size, 255
bytes or unlimited.
Data
Potential datapaths (data operation mode dependant)
Tx/Rx
Rx
Tx
SYNC
RECOG.
Figure 22. SX1231 Data Processing Conceptual View
PACKET
HANDLER
CONTROL
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FIFO
(+SR)
SPI
DATASHEET
MISO
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SCK
MOSI
NSS
SX1231
DIO0
DIO2
DIO3
DIO4
DIO5
DIO1