CYRF6936-40LTXC Cypress Semiconductor Corp, CYRF6936-40LTXC Datasheet - Page 4

• Manufacturer Part Number: CYRF6936-40LTXC
• Description: IC WIRELESS USB LP 2.4GHZ 40VQFN
• Manufacturer: Cypress Semiconductor Corp
• Type: USB Interface ICr

Specifications of CYRF6936-40LTXC

• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 1Mbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: Home Automation, Security
• Power - Output: 4dBm
• Sensitivity: -97dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 21.2mA
• Current - Transmitting: 34mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 55 C to + 125 C
• Propagation Delay Time Ns: 25 ns
• Supply Current: 21 mA
• Operating Supply Voltage: 1.8 V to 3.6 V
• Rohs Compliant: YES
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2962

field, plus two bytes for the CRC16. The alternative to using the
length field is to infer an EOP condition from a configurable
number of successive noncorrelations; this option is not
available in GFSK mode and is only recommended when using
SDR mode.
CRC16
The device may be configured to append a 16 bit CRC16 to each
packet. The CRC16 uses the USB CRC polynomial with the
added programmability of the seed. If enabled, the receiver
verifies the calculated CRC16 for the payload data against the
received value in the CRC16 field. The seed value for the CRC16
calculation is configurable, and the CRC16 transmitted may be
calculated using either the loaded seed value or a zero seed; the
Packet Buffers
All data transmission and reception use the 16 byte packet
buffers - one for transmission and one for reception.
The transmit buffer allows loading a complete packet of up to 16
bytes of payload data in one burst SPI transaction. This is then
transmitted with no further MCU intervention. Similarly, the
receive buffer allows receiving an entire packet of payload data
up to 16 bytes with no firmware intervention required until the
packet reception is complete.
The CYRF6936 IC supports packets up to 255 bytes. However,
the actual maximum packet length depends on the accuracy of
the clock on each end of the link and the data mode. Interrupts
are provided to allow an MCU to use the transmit and receive
buffers as FIFOs. When transmitting a packet longer than 16
bytes, the MCU can load 16 bytes initially, and add further bytes
to the transmit buffer as transmission of data creates space in
the buffer. Similarly, when receiving packets longer than 16
bytes, the MCU must fetch received data from the FIFO
periodically during packet reception to prevent it from
overflowing.
Document #: 38-16015 Rev. *I
P re a m b le
n x 1 6 u s
P
1 s t F ra m in g
S y m b o l*
S O P 1
2 n d F ra m in g
S y m b o l*
S O P 2
P r e a m b l e
n x 1 6 u s
P
L e n g th
1 s t F r a m i n g
P a c k e t
Figure 3. Example ACK Packet Format
1 B y te
P e rio d
le n g th
S y m b o l *
S O P 1
Figure 2. Example Packet Format
P a y lo a d D a ta
2 n d F r a m i n g
S y m b o l *
S O P 2
received data CRC16 is checked against both the configured
and zero CRC16 seeds.
CRC16 detects the following errors:
■
■
■
■
Figure 2
lengths fields enabled, and
packet.
Auto Transaction Sequencer (ATS)
The CYRF6936 IC provides automated support for transmission
and reception of acknowledged data packets.
When transmitting in transaction mode, the device automatically:
■
■
■
■
■
Similarly, when receiving in transaction mode, the device
automatically:
■
■
■
The contents of the packet buffers are not affected by the
transmission or reception of ACK packets.
Any one bit in error.
Any two bits in error (irrespective of how far apart, which
column, and so on).
Any odd number of bits in error (irrespective of the location).
An error burst as wide as the checksum itself.
starts the crystal and synthesizer
enters transmit mode
transmits the packet in the transmit buffer
transitions to receive mode and waits for an ACK packet
transitions to the transaction end state when an ACK packet is
received or a timeout period expires
waits in receive mode for a valid packet to be received
transitions to transmit mode, transmits an ACK packet
transitions to the transaction end state (receive mode to await
the next packet, and so on.)
r e c e i v e d p a c k e t .
C R C f i e l d f r o m
2 B y t e p e r i o d s
shows an example packet with SOP, CRC16, and
C R C 1 6
Figure 3
shows a standard ACK
*N o te :3 2 o r 6 4 u s
C R C 1 6
CYRF6936
* N o t e : 3 2 o r 6 4 u s
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