CYRF7936-40LTXC Cypress Semiconductor Corp, CYRF7936-40LTXC Datasheet - Page 4

• Manufacturer Part Number: CYRF7936-40LTXC
• Description: IC TXRX CYFI 2.4GHZ 40VQFN
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYRF7936-40LTXC

• Frequency: 2.4GHz
• Data Rate - Maximum: 1Mbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: Home/Building Automation, Industrial Control and Monitoring
• Power - Output: 4dBm
• Sensitivity: -97dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 21mA
• Current - Transmitting: 21mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-VQFN Exposed Pad, 40-HVQFN, 40-SQFN, 40-DHVQFN
• Receiving Current: 21.2mA
• Transmitting Current: 26.2mA
• Data Rate: 1Mbps
• Frequency Range: 2.4GHz To 2.497GHz
• Modulation Type: GFSK
• Rf Ic Case Style: QFN
• No. Of Pins: 40
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. Pin Description - CYRF7936 40-Pin QFN (continued)
Functional Overview
The CYRF7936 IC is designed to implement wireless device
links operating in the worldwide 2.4-GHz ISM frequency band. It
is intended for systems compliant with worldwide regulations
covered by ETSI EN 301 489-1 V1.41, ETSI EN 300 328-1
V1.3.1 (Europe), FCC CFR 47 Part 15 (USA and Industry
Canada), and TELEC ARIB_T66_March, 2003 (Japan).
The CYRF7936 contains a 2.4-GHz CyFi radio modem, which
features a 1-Mbps GFSK radio front-end, packet data buffering,
packet framer, DSSS baseband controller, and RSSI.
CYRF7936 features a SPI interface for data transfer and device
configuration.
The CyFi radio modem supports 98 discrete 1-MHz channels
(regulations may limit the use of some of these channels in
certain jurisdictions).
The baseband performs DSSS spreading and despreading,
start-of-packet (SOP), end-of-packet (EOP) detection, and
CRC16 generation and checking. The baseband may also be
configured to automatically transmit ACK handshake packets
whenever a valid packet is received.
When in receive mode, with packet framing enabled, the device
is always ready to receive data transmitted at any of the
supported bit rates. This enables the implementation of
mixed-rate systems in which different devices use different data
rates. This also enables the implementation of dynamic data rate
systems that use high data rates at shorter distances or in a
low-moderate interference environment or both. It changes to
lower data rates at longer distances or in high interference
environments or both.
In addition, the CYRF7936 IC has a power management unit
(PMU), which allows direct connection of the device to any
battery voltage in the range 1.8 V to 3.6 V. The PMU conditions
the battery voltage to provide the supply voltages required by the
device, and may supply external devices.
Data Transmission Modes
The CyFi radio transceiver supports two different data
transmission modes:
■
■
Both 64 chip and 32 chip pseudo noise (PN) codes are supported
in 8DR mode. In general, lower data rates reduce packet error
rate in any given environment.
Document Number: 001-48013 Rev *E
37
40
E-pad
Corner tabs
In GFSK mode, data is transmitted at 1 Mbps, without any
DSSS.
In 8DR mode, DSSS is enabled and eight bits are encoded in
each derived code symbol transmitted.
Pin Number
LVD
V
GND
NC
REG
Name
Type
GND
Pwr
NC
O
Default
PMU inductor or diode connection, when used. If not used, connect to GND.
PMU boosted output voltage feedback
Must be soldered to ground
Do not solder the tabs and keep other signal traces clear. All tabs are common to
the lead frame or paddle, which is grounded after the pad is grounded. While they
are visible to the user, they do not extend to the bottom.
Packet Framing
The CYRF7936 IC device supports the following data packet
framing features:
SOP
Packets
SOP_CODE_ADR PN code used for the SOP is different from
that used for the “body” of the packet, and if necessary may be
a different length. SOP must be configured to be the same length
on both sides of the link.
Length
This is the first eight bits after the SOP symbol and is transmitted
at the payload data rate. An EOP condition is inferred after
reception of the number of bytes defined in the length field, plus
two bytes for the CRC16.
CRC16
The device may be configured to append a 16-bit CRC16 to each
packet. The CRC16 uses the USB CRC polynomial with the
added programmability of the seed. If enabled, the receiver
verifies the calculated CRC16 for the payload data against the
received value in the CRC16 field. The seed value for the CRC16
calculation is configurable, and the CRC16 transmitted may be
calculated using either the loaded seed value or a zero seed. The
received data CRC16 is checked against both the configured
and zero CRC16 seeds.
CRC16 detects the following errors:
■
■
■
■
Figure 2
lengths fields enabled and
packet.
Any one bit in error.
Any two bits in error (irrespective of how far apart, which
column, and so on).
Any odd number of bits in error (irrespective of the location).
An error burst as wide as the checksum itself.
shows an example packet with SOP, CRC16, and
begin
Description
with
a
two-symbol
Figure 3
shows a standard ACK
SOP
CYRF7936
marker.
Page 4 of 22
The
[+] Feedback