AMIS-52150-XTD ON Semiconductor, AMIS-52150-XTD Datasheet - Page 20

• Manufacturer Part Number: AMIS-52150-XTD
• Description: TXRX RF SUB 1GHZ CDR 20-SSOP
• Manufacturer: ON Semiconductor

Specifications of AMIS-52150-XTD

• Frequency: 300Mhz ~ 768MHz
• Data Rate - Maximum: 16kbps
• Modulation Or Protocol: ASK, OOK
• Applications: Wireless Modules
• Power - Output: 12dBm
• Sensitivity: -117dBm
• Voltage - Supply: 2.3 V ~ 3.6 V
• Current - Receiving: 7.5mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: 0°C ~ 50°C
• Package / Case: 20-SSOP
• Ic Interface Type: I2C
• No. Of Tx Buffers: 1
• No. Of Rx Buffers: 1
• No. Of Filters: 1
• No. Of Interrupts: 1
• Supply Voltage Range: 2.3V To 3.6V
• Digital Ic Case Style: SSOP
• No. Of Pins: 20
• Rohs Compliant: No
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Modulation Type: ASK/OOK
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 766-1020

AMIS-52150
Table 27: Data and Clock Recovery Control Registers
The clock and data recovery function is dependent on the receiver’s ability to recover the data from the incoming RF signal. There
exists a technique to test the clock and data recovery function without having to set up the receiver to receive data. This is a test mode
that allows an input data stream (square wave at
CLKOUT pin and the recovered data appearing on the TX/RX pin, respectively. Once the AMIS-52150 is configured for clock and data
Data and Clock Recovery Associated Registers
Register (HEX)
0x07
0x08
0x09
0x0d
0x10
0x11
0x12
Name
FWORD LSB
FWORD
FWORD MSB
DATA MUX
CLKMUX
K
K
K
FsDIV
STOP CHECK
LOOPCLAMP
FREERUN
CRD RESET
AUTO/MANUAL
RESET
SAMPLE
WINDOW
0
1
2
0,1,2
4,5,6
0,1,2
4,5,6
Bits
0,1
2,3
All
All
All
6
7
4
5
6
7
States
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
Rev. 7 | Page 20 of 25 | www.onsemi.com
00
01
10
11
00
01
10
11
00
00
1
0
1
0
1
0
1
0
1
0
1
/
2
the data rate) on the RSSI pin, with the recovered clock data appearing on the
Comments
Sets the initial internal clock frequency for the clock and data
recovery circuits
TX/RX normal signals
Recovered data on TX/RX
Normal CLKOUT signals
Recovered CLOCK output on CLKOUT
Filter coefficient gain is 1
Filter coefficient gain is 2
Filter coefficient gain is 4
Filter coefficient gain is 8
Filter coefficient gain is 16
Filter coefficient gain is 32
Filter coefficient gain is 64
Filter coefficient gain is 128
Filter coefficient gain is 1
Filter coefficient gain is 2
Filter coefficient gain is 4
Filter coefficient gain is 8
Filter coefficient gain is 16
Filter coefficient gain is 32
Filter coefficient gain is 64
Filter coefficient gain is 128
Filter coefficient gain is 0.125
Filter coefficient gain is 0.250
Filter coefficient gain is 0.500
Filter coefficient gain is 1.000
Filter coefficient gain is 2
Filter coefficient gain is 4
Filter coefficient gain is 8
Filter coefficient gain is 16
Sample frequency divider is 2
Sample frequency divider is 4
Sample frequency divider is 8
Sample frequency divider is 16
Sample frequency divider is 20
Sample frequency divider is 32
Sample frequency divider is 40
Sample frequency divider is 48
StopCheck bits: disabled
StopCheck bits: 2
StopCheck bits: 4
StopCheck bits: 8
Loop clamp value is: +-BaudClk/8
Loop clamp value is: +-BaudClk/16
Loop clamp value is: +-BaudClk/32
Loop clamp value is: +-BaudClk/64
Phase alignment enabled
Phase alignment disabled
CDR reset disabled
CDR reset enabled
POR reset (auto)
CDR reset enabled (manual)
Sampling starts with bit start edge
Sampling centered around bit center