ATMEGA2561R231-MU Atmel, ATMEGA2561R231-MU Datasheet - Page 56
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ATMEGA2561R231-MU
Manufacturer Part Number
ATMEGA2561R231-MU
Description
BUNDLE ATMEGA2561/RF231 QFN
Manufacturer
Atmel
Datasheet
1.ATMEGA640V-8CU.pdf
(444 pages)
Specifications of ATMEGA2561R231-MU
Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Data Interface
PCB, Surface Mount
Memory Size
256kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-QFN, 32-QFN
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
8 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (10Mb)
10.10 Register Description
10.10.1
10.10.2
2549M–AVR–09/10
SMCR – Sleep Mode Control Register
PRR0 – Power Reduction Register 0
There are three alternative ways to disable the OCD system:
•
•
•
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 10-2.
Note:
• Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bit 7 - PRTWI: Power Reduction TWI
Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When
waking up the TWI again, the TWI should be re initialized to ensure proper operation.
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
(0x64)
Read/Write
Initial Value
Disable the OCDEN Fuse.
Disable the JTAGEN Fuse.
Write one to the JTD bit in MCUCR.
SM2
0
0
0
0
1
1
1
1
1. Standby modes are only recommended for use with external crystals or resonators.
PRTWI
Sleep Mode Select
R/W
7
0
7
–
R
0
SM1
0
0
1
1
0
0
1
1
PRTIM2
R/W
6
0
6
–
R
0
ATmega640/1280/1281/2560/2561
PRTIM0
R/W
5
0
R
5
–
0
SM0
0
1
0
1
0
1
0
1
R
4
–
0
R
4
–
0
PRTIM1
R/W
3
0
SM2
R/W
3
0
PRSPI
R/W
2
0
ADC Noise Reduction
SM1
R/W
Extended Standby
2
0
Sleep Mode
Power-down
Power-save
Standby
Reserved
Reserved
PRUSART0
Idle
SM0
R/W
Table
R/W
1
0
1
0
(1)
10-2.
(1)
R/W
SE
PRADC
0
0
R/W
0
0
SMCR
PRR0
56
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