AT86RF211DAI-R Atmel, AT86RF211DAI-R Datasheet
AT86RF211DAI-R
Specifications of AT86RF211DAI-R
Related parts for AT86RF211DAI-R
AT86RF211DAI-R Summary of contents
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Features • Multiband Transceiver: 400 MHz to 950 MHz • Monochip RF Solution: Transmitter-Receiver-Synthesizer • Integrated PLL and VCO: No External Coil • Very Resistant to Interferers by Design • Digital Channel Selection • 200 Hz Steps • Data Rates ...
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General Overview General Overview of Functioning Normal Mode Wake-up Mode AT86RF211 2 The AT86RF211 is a microcontroller RF peripheral: all the user has write/read registers to setup the chip (i.e. frequency selection) or have information about ...
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Figure 1. Reception and Transmit Mode Companion Microcontroller Companion Microcontroller 1942C–WIRE–06/ Frequency of transmitted signal AT86RF211 (TRX01) SLE, SCK, SDATA (for set-up) 3 AT86RF211 acts like a "pipe" (data is transmitted with NO processing): automatic data to frequency ...
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Figure 2. Wake-up Overview Step 2: The chip wakes-up periodically, waiting for an expected message (stand-alone operation) Step 1: The chip is set up in sleep mode using the 3-wire interface (SLE, SCK, SDATA), then Microcontroller goes to sleep, waiting ...
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Block Diagram Figure 4. AT86RF211 Block Diagram RF FILTER These are the only blocks that depend on the selected ISM band (433, 868 or 915 MHz): dual band applications can be done by only switching them. Synthesizer, loop filter, IF ...
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Pin Description Table 1. Pinout Pin Name Comments 1 RPOWER Full scale output power resistor 2 TXGND1 GND input/output 4 TXGND2 GND 5 TXGND3 GND 6 TXGND4 GND 7 TXVCC VCC 8 TXGND5 GND 9 DIGND GND ...
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Detailed Description Frequency Synthesis Crystal Reference Oscillator Figure 6. Typical Networks XTAL1 ( Notes: 1. Various load capacitance (C must be re-calculated. 2. Thanks to the fine steps of ...
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AT86RF211 8 Figure 7. Synthesizer Loop Filter Schematic Fref FILT1 Note: The PLL loop filter can be designed to optimize the phase noise around the carrier. Three configurations can be suggested, regarding the application ...
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Receiver Description Figure 8. Typical Expected Currents in Rx Mode 32.00 30.00 28.00 26.00 2.25 10.00 8.00 6.00 4.00 2.00 0.00 2.25 1942C–WIRE–06/02 Supply Current - Rx Mode 2.50 2.75 3.00 3.25 Vsupply (V) Detailed Current - Rx Mode 2.50 ...
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Overview and Choice of Intermediate Frequencies Switch Image Rejection and RF Filter Figure 9. Typical 50 SAW Filter Implementation in the 868 MHz Band SWOUT (pin 48) SPST Switch AT86RF211 10 For selectivity and flexibility purpose, a ...
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First LNA/Mixer 1942C–WIRE–06/02 Figure 10. TEM Filter Such a filter also provides an out-of-band interference rejection greater than 20dB, 40 MHz away from 433 MHz. The main characteristics of the LNA/Mixer are typically: • Voltage gain for the ...
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IF1 filtering IF1 Gain and Second Mixer AT86RF211 12 Figure 11. Schematic Input of the LNA RXIN Figure 12. Schematic Output of the Mixer The first mixer translates the input RF signal down to 10.7 MHz or 21.4 MHz as ...
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IF2 Filtering and Gain 1942C–WIRE–06/02 Figure 13. IF1 Filtering IF1OUT (pin 36) 330 Ω Figure 14. Schematic Input of IF1 Amplifier IF1IN IF1DEC Figure 15. Schematic Output of the Second Mixer IF2 filtering achieves a narrow channel selection. In case ...
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IF2 Amplifier Chain AT86RF211 14 Figure 16. LC Band-pass Filter 10 nF Filter gain ~ F1 40 kHz or higher • capacitors cut DC response forward and backward. • The first network has the low cut-off frequency. • ...
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RSSI Output Figure 18. Typical RSSI output (board implementation 25° -110 Note: Should the RSSI be required for accurate measurement purpose (precision better than 5 dB), then it is ...
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FSK Demodulator AT86RF211 16 Figure 19. ADC Converter Input Selection RSSI M U Vcc supply M X Voltage U DISCOUT X (MOFFSET) CTRL1[1] Note: For voltage measurement, the LSB weighs 85 mV and the reference voltage is 1.25V. The ADC ...
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Data Slicer 1942C–WIRE–06/02 The input RBW resistor controls the discriminator bandwidth. This bandwidth is selected by CTRL1[6]. The default value is "standard discriminator BW". The slope of the discrim- inator increases by 5 mV/kHz/V with V Example ...
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Figure 22. How to Set Up the Data Slicing Parameters DISCOUT: demodulated data AT86RF211 18 To operate this way, the user must make sure that the "0" and "1" level at the output of the discriminator are "on both sides" ...
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Transmitter Description Figure 23. Typical Expected Currents in Tx Mode 65.00 60.00 55.00 50.00 45.00 40.00 35.00 30.00 25.00 20.00 15.00 2.25 30.00 25.00 20.00 15.00 10.00 5.00 0.00 2.25 1942C–WIRE–06/02 Supply Current - Tx Mode 2.50 2.75 3.00 3.25 ...
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Power Amplification Figure 25. Output Matching at 868 MHz Power supply filtering Vcc RF PA output Note: The filter is designed to meet relevant regulations. Please refer to application note for details. AT86RF211 20 The Power Amplifier has been built ...
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Figure 27. Typical Output Power of the PA for T = 25°C and Hardware Control 1942C–WIRE–06/02 An automatic level control loop (ALC) is integrated, in order to minimize the ...
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Software Control Control Logic Serial Data Interface AT86RF211 22 Figure 28. R Input Schematic POWER Note: Keeping the PA output matched guarantees maximum power efficiency. The power can then be adjusted, from the value set below, ...
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Figure 29. Write Chronogram: Complete Write Cycle bits Register A[3] A[ Figure 30. Write Chronogram: Partial Write Cycle, Writing 2 bits ...
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Figure 31. Read Chronogram: Complete Read Cycle from a 10 bits Register SLE SCK SDATA A[3] A[2 ] SDATA INPUT direction Figure 32. Read chronogram: Partial Read Cycle, Reading 2 bits SLE SCK SDATA SDATA mode AT86RF211 24 Only the ...
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Figure 33. Chronogram with Timing tdle SLE T SCK SDATA A[3] A[2 ] SDATA INPUT direction Note: For the timing specification, please refer to the timing table “Digital CMOS DC Characteristics” on page 42. Registers Table 4. Registers Overview Name ...
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Reset Register (RESET) Control Register (CTRL1) Table 5. CTRL1 Overview Name PDN RXTX DATACLK nbit 31 30 init 0 0 Name TXLVL TXFS - nbit 14- (000 ) init Register reset value = (10000270 ...
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Table 6. CTRL1 Detailed Description Number Name of Bits Comments PDN 1 General power-down 0: power down mode; only the serial interface is active 1: AT86RF211 activated RXTX 1 Reception or transmission selection 0: Rx mode 1: Tx mode DATACLK ...
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Table 6. CTRL1 Detailed Description Number Name of Bits Comments – 1 reserved, must be kept to reset value: 0 RXFS 2 RX frequency selection (00 (01 XTALFQ 1 Crystal frequency 0: 10.245 MHz ...
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Control Register (CTRL2) Table 7. CTRL2 Overview Name DATARATE nbit 31-18 init (0000) 16 Register reset value = (00000057) Table 8. CTRL2 Detailed Description Number of Name bits Comments DATARATE 14 Received DATAMSG rate This value must be programmed to ...
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Figure 34. Clock Recovery DATAMSG DATACLK AT86RF211 30 If the tolerance is too high, the rate value is reached earlier, and the rate value could be unstable (too big step). If the tolerance is too low, it could be difficult ...
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DATARATE[13:0] Rate (1067) 9.6 kbps 10 (2135) 4.8 kbps 10 (4269) 2.4 kbps 10 (10246) 1 kbps 10 • Datatol Programming The tolerance for the extraction of DATA rate must be nearly 2% of the RATE. The toler- ance ...
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... Frequency code value F3 Note: 1. F0, F1, F2 and F3 registers must be programmed before using the device. There is no simple relationship between frequency registers and the exact frequency. Atmel provides a tool to program them on a production bench. • Frequency Registers Selection The FSK modulation is completely integrated. Two registers have to be programmed (default F0 and F1) to allow " ...
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Status Register 1942C–WIRE–06/02 In reception mode, only one frequency needs to be programmed. In transmission mode, two different registers (F0 & F1), or (F2 & F3) must be programmed for “0” code and “1” code transmission. The DATAMSG pin value ...
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DTR Register AT86RF211 34 Table 11. Status Register Detailed Description Number Name of bits Comments PLLL 1 PLL Lock flag 0: PLL unlocked 1: PLL locked MRSSI 6 Measured RSSI level MVCC 6 Measured V MOFFSET = 1 WAKEUP 1 ...
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Wake-up Control Register Table 14. WUC Overview Name WUE DATA nbit 31 init 0 Name WL2 nbit 5-3 init (010) 2 Register reset value = (7f8be110) Table 15. WUC Detailed Description Number Name of bits Comments WUE 1 Wake-up function ...
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Table 15. WUC Detailed Description (Continued) Number Name of bits Comments DATL 5 Data length Valid in fixed data length mode (STOP = 0). (00000) ------------------- (11110) (11111) ADD 1 Address content 0: message without address field 1: message with ...
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Table 16. Wake Up Period Programming WPER[8:0] WPER[8:7] (000) (00 (001) (00 – (00) 10 (07e) (00 (07f) (00 (101) or (081) (10) or (01 (102) or (082) (10) ...
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Wake-up Data Rate Register (WUR) Table 19. WUR Overview Name WUOP nbit 17-16 init (01) 2 Table 20. WUR Detailed Description Name Number of bits WUOP 2 RATECHK 1 RATE 10 RATETOL 5 AT86RF211 38 • WL2 programming WL2 can ...
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Wake Up Address Register (WUA) Table 21. WUA Overview Name nbit init Table 22. WUA Detailed Description Name Number of bits ADDL 5 ADD 20 1942C–WIRE–06/02 The data rate (in bps) and the decimal value to be coded in the ...
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Wake-up Data Register (WUD) Table 23. WUD Overview Name nbit Table 24. WUD Detailed Description Name Number of bits Comments WUD Length Wake-up message data Warning: The length of this register is variable: * case fixed data length (STOP = ...
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Electrical Specification Absolute Maximum Ratings DC Characteristics 1942C–WIRE–06/02 ESD sensitive device: storage or handling of the device must be carried out according to usual protection rules. Temperature Storage temperature Supply voltage Digital input voltage RXIN input power Note: Stresses beyond ...
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Digital CMOS DC Characteristics Name Parameter Vil CMOS low level input voltage (2) - Normal input (3) - Schmitt trigger input Vih CMOS high level input voltage (2) - Normal input (3) - Schmitt trigger input Vol CMOS low level ...
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Synthesizer Specification Parameter Frequency Range Frequency Range Crystal Frequency Crystal Frequency Oscillator Settling Time (2) Lock Time (2) Lock Time Phase Noise 400 to 480 MHz Phase Noise 800 to 950 MHz Phase Noise 400 to 480 MHz Phase Noise ...
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Transmitter Specification Parameter Output Power Output Power Output Power Output Power Dynamic Range Automatic Level Control Accuracy Automatic Level Control Accuracy FSK Data Rate Toggle Time Notes: 1. Output power for and TXLVL ...
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Typical Application Implementation Rpower ANTENNA Note: Accurate information about parts and values of components to be used around AT86RF211 are described in our application notes. "RF Bill-of-Material/cost for 868-915 MHz applications". 1942C–WIRE–06/02 ...
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Layout Reference Design Top Layer Each unused area must be filled with copper and connected to the bottom side ground plane Decoupling capacitors remain close to the supply pins Reference Design Bottom Layer One-block ground plane with no slot under ...
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Packaging Information Dimension Nominal Value (mm) A 1.60 A1 0.05 min/0.15 max A2 1.40 D 9.00 D1 7.00 E 9.00 E1 7.00 L 0.60 e 0.50 b 0.22 ccc 0.1 Ordering information Full Part Number AT86RF211 DAI AT86RF211 DAI-R 1942C–WIRE–06/02 ...
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... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...