LMX9820ASMX/NOPB National Semiconductor, LMX9820ASMX/NOPB Datasheet - Page 35

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LMX9820ASMX/NOPB

Manufacturer Part Number
LMX9820ASMX/NOPB
Description
MODULE BLUETOOTH SERIAL PORT SMD
Manufacturer
National Semiconductor
Datasheet

Specifications of LMX9820ASMX/NOPB

Frequency
2.4GHz
Data Rate - Maximum
704kbps
Modulation Or Protocol
Bluetooth v1.1, Class 2
Applications
PDA's, POS Terminals
Power - Output
1dBm
Sensitivity
-81dBm
Voltage - Supply
2.85 V ~ 3.6 V
Current - Receiving
65mA
Current - Transmitting
68mA
Data Interface
PCB, Surface Mount
Memory Size
256Kb Flash
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
116-LTCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMX9820ASMX
LMX9820ASMXTR
Notes:
Capacitor values, Ct1, Ct2, C1 and C2 may vary depending on board design crystal manufacturer specification.
Single ground plane is used for both RF and digital grounds.
Recommend that a 4 component T-PI pad be used between RF output and antenna. This allows for versatility in the design such that the
match to the antenna maybe improved and/or the blocking margin increased by use a LC filter.
14.0 Application Information
Figure 24 on page 35 represents a typical system sche-
matic with optional 32KHz mounted for the LMX9820A.
14.1 MATCHING NETWORK
The antenna matching network may or may not be
required, depending upon the impedance of the antenna
chosen. A 6.8 pF blocking capacitor is recommended.
14.2 FILTERED POWER SUPPLY
It is important to provide the LMX9820A with adequate
ground planes and a filtered power supply. It is highly rec-
ommended that a 0.1 µF and a 10 pF bypass capacitor be
placed as close as possible to V
LMX9820A.
14.3 HOST INTERFACE
To set the logic thresholds of the LMX9820A to match the
host system, IOV
logic power supply of the host system. It is highly recom-
mended that a 10 pF bypass capacitor be placed as close
as possible to the IOV
Ct1
32 KHz
Y2
Connect to
PCM codec
or leave open
Optional 32KHz
Circuitry
12 MHz
Y1
CC
C2
C1
Ct2
(pad H12) must be connected to the
CC
pad on the LMX9820A.
C13
B13
C11
C12
B10
B12
B9
B8
Clk+
Clk-
AAI_sclk
32kHz_CLKO
32kHz_CLKI
AAI_srd
AAI_std
AAI_sfs
B1 Antenna
CC
6.8 pF
RF_inout
Figure 24. Example System Schematic
(pad H2) on the
H8
10 pF
RF GND
LMX9820A
35
0.01 µF
ISEL2 (pad H13) and ISEL1 (pad J13) can be strapped to
the host logic 0 and 1 levels to set the host interface boot-
up configuration. Alternatively both ISEL2 and ISEL1 can
be hardwired over 10k pullup/pulldown resistors.
Env0 (pad E9) and Env1 (pad B11) can be left uncon-
nected (both are pulled high), if no ISP capability is
required. If the ISP environment mode is needed, then
Env0 must be driven to logic low and Reset needs to be
asserted. After de-assertion of Reset, the LMX9820A boots
into the mode corresponding to the values present on Env0
and Env1. Alternatively, a firmware upgrade command can
be used.
14.4 CLOCK INPUT
The clock source must be placed as close as possible to
the LMX9820A. The quality of the radio performance is
directly related to the quality of the clock source connected
to the oscillator port on the LMX9820A. Careful attention
must be paid to the crystal/oscillator parameters or radio
performance could be drastically reduced.
14.5 SCHEMATIC AND LAYOUT EXAMPLES
D12, G11
Dig_gnd[1:2]
H2
V
CC
Reset_5100
IO
H12
Uart_cts
Reset_b
Uart_rts
Uart_rx
Uart_tx
ISEL1
ISEL2
V
Env0
Env1
CC
10 pF
J13
H13
C9
D9
D10
C10
D11
G8
E9
B11
VCC
0.01 µF
max
1K
Reference
Table 17 on
page 15.
Reference
Table 18 on
page 16.
Connect to system
UART bus.
No HW Flowcontrol:
- CTS GND
- RTS NC
Reference Table
25 on page 23
for correct POR
timing.
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