TDK5111 Infineon Technologies, TDK5111 Datasheet - Page 16

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TDK5111

Manufacturer Part Number
TDK5111
Description
TRANSMITTER ASK/FSK SGL TSSOP16
Manufacturer
Infineon Technologies
Type
Transmitterr
Datasheet

Specifications of TDK5111

Package / Case
16-TSSOP
Frequency
314MHz ~ 317MHz
Applications
Alarm Systems, Communication Systems
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
20 kbps
Power - Output
10dBm
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.1 V ~ 4 V
Operating Temperature
-40°C ~ 125°C
Operating Frequency
317 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
SP000014016
SP000014017
TDK5111T

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TDK 5111
Functional Description
3.4.5 Power Modes
The IC provides three power modes, the POWER DOWN MODE, the PLL
ENABLE MODE and the TRANSMIT MODE.
3.4.5.1 Power Down Mode
In the POWER DOWN MODE the complete chip is switched off.
The current consumption is typically 0.25 nA at 3 V 25°C.
This current doubles every 8°C. The values for higher temperatures are
typically 14 nA at 85°C and typically 600 nA at 125°C.
3.4.5.2 PLL Enable Mode
In the PLL ENABLE MODE the PLL is switched on but the power amplifier is
turned off to avoid undesired power radiation during the time the PLL needs to
settle. The turn on time of the PLL is determined mainly by the turn on time of
the crystal oscillator and is less than 1 msec when the specified crystal is used.
The current consumption is typically 4 mA.
3.4.5.3 Transmit Mode
In the TRANSMIT MODE the PLL is switched on and the power amplifier is
turned on too.
The current consumption of the IC is typically 13 mA when using a proper trans-
forming network at PAOUT, see Figure 4-1.
3.4.5.4 Power mode control
The bias circuitry is powered up via a voltage V > 1.5 V at the pin PDWN (pin 1).
When the bias circuitry is powered up, the pins ASKDTA and FSKDTA are
pulled up internally.
Forcing the voltage at the pins low overrides the internally set state.
Alternatively, if the voltage at ASKDTA or FSKDTA is forced high externally, the
PDWN pin is pulled up internally via a current source. In this case, it is not nec-
essary to connect the PDWN pin, it is recommended to leave it open.
The principle schematic of the power mode control circuitry is shown in
Figure 3-5.
Wireless Components
3 - 10
Specification, October 2002

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