M24LR64-RMB6T/2 STMicroelectronics, M24LR64-RMB6T/2 Datasheet - Page 45
M24LR64-RMB6T/2
Manufacturer Part Number
M24LR64-RMB6T/2
Description
13.56MHZ 64KBIT EEPROM UFDFPN8
Manufacturer
STMicroelectronics
Datasheet
1.M24LR64-RMB6T2.pdf
(128 pages)
Specifications of M24LR64-RMB6T/2
Featured Product
STM32 Cortex-M3 Companion Products
Rf Type
Read / Write
Frequency
13.56MHz
Features
64 Kbit EEPROM
Package / Case
8-MLP, 8-UFDFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10485-2
M24LR64-RMR6T/2
M24LW64-RMB6T/2
M24LR64-RMR6T/2
M24LW64-RMB6T/2
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M24LR64-R
9.3
9.4
VCD to M24LR64-R frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are
implemented using code violation. Unused options are reserved for future use.
The M24LR64-R is ready to receive a new command frame from the VCD 311.5 µs (t
sending a response frame to the VCD.
The M24LR64-R takes a power-up time of 0.1 ms after being activated by the powering field.
After this delay, the M24LR64-R is ready to receive a command frame from the VCD.
Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame.
The SOF sequence described in
SOF sequence described in
sequence for either coding mode is described in
Figure 20. SOF to select 1 out of 256 data coding mode
Figure 21. SOF to select 1 out of 4 data coding mode
9.44µs
9.44 µs
37.76 µs
37.76µs
Figure 21
Doc ID 15170 Rev 12
Figure 20
selects the 1 out of 4 data coding mode. The EOF
selects the 1 out of 256 data coding mode. The
9.44µs
Figure
9.44µs
22.
37.76µs
37.76 µs
Data rate and data coding
9.44 µs
AI06661
AI06660
2
) after
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