M24LR64-RMB6T/2 STMicroelectronics, M24LR64-RMB6T/2 Datasheet - Page 68
M24LR64-RMB6T/2
Manufacturer Part Number
M24LR64-RMB6T/2
Description
13.56MHZ 64KBIT EEPROM UFDFPN8
Manufacturer
STMicroelectronics
Datasheet
1.M24LR64-RMB6T2.pdf
(128 pages)
Specifications of M24LR64-RMB6T/2
Featured Product
STM32 Cortex-M3 Companion Products
Rf Type
Read / Write
Frequency
13.56MHz
Features
64 Kbit EEPROM
Package / Case
8-MLP, 8-UFDFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10485-2
M24LR64-RMR6T/2
M24LW64-RMB6T/2
M24LR64-RMR6T/2
M24LW64-RMB6T/2
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Figure 50. Principle of comparison between the mask, the slot number and the UID
The AFI field is present if the AFI_flag is set.
The pulse is generated according to the definition of the EOF in ISO/IEC 15693-2.
The first slot starts immediately after the reception of the request EOF. To switch to the next
slot, the VCD sends an EOF.
The following rules and restrictions apply:
●
●
Mask value received in the Inventory command
The Mask value less the padding 0s is loaded
into the Tag comparator
The Slot counter is calculated
The Slot counter is concatened to the Mask value
The concatenated result is compared with
the least significant bits of the Tag UID.
if no M24LR64-R answer is detected, the VCD may switch to the next slot by sending
an EOF,
if one or more M24LR64-R answers are detected, the VCD waits until the complete
frame has been received before sending an EOF for switching to the next slot.
Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits
Nb_slots_flags = 0
Doc ID 15170 Rev 12
b63
xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx
Bits ignored
UID
MSB
MSB
0000 0100 1100 1111 b 16 bits
MSB
xxxx
xxxx 100 1100 1111 b
LSB
MSB
100 1100 1111 b 11 bits
Compare
LSB
LSB
LSB
b0
b
4 bits
15 bits
64 bits
M24LR64-R
AI06682
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