M24LR64-RDW6T/2 STMicroelectronics, M24LR64-RDW6T/2 Datasheet - Page 57
M24LR64-RDW6T/2
Manufacturer Part Number
M24LR64-RDW6T/2
Description
13.56MHZ 64KBIT EEPROM 8 TSSOP
Manufacturer
STMicroelectronics
Specifications of M24LR64-RDW6T/2
Featured Product
STM32 Cortex-M3 Companion Products
Rf Type
Read / Write
Frequency
13.56MHz
Features
64 Kbit EEPROM
Package / Case
8-TSSOP
Memory Size
64 KB
Organization
2 K x 32
Interface Type
I2C
Maximum Clock Frequency
400 KHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
600 uA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10487-2
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M24LR64-R
15
15.1
Data storage format identifier (DSFID)
The data storage format identifier indicates how the data is structured in the M24LR64-R
memory. The logical organization of data can be known instantly using the DSFID. It can be
programmed and locked using the Write DSFID and Lock DSFID commands.
CRC
The CRC used in the M24LR64-R is calculated as per the definition in ISO/IEC 13239. The
initial register contents are all ones: “FFFF”.
The two-byte CRC are appended to each request and response, within each frame, before
the EOF. The CRC is calculated on all the bytes after the SOF up to the CRC field.
Upon reception of a request from the VCD, the M24LR64-R verifies that the CRC value is
valid. If it is invalid, the M24LR64-R discards the frame and does not answer to the VCD.
Upon reception of a Response from the M24LR64-R, it is recommended that the VCD
verifies whether the CRC value is valid. If it is invalid, actions to be performed are left to the
discretion of the VCD designer.
The CRC is transmitted least significant byte first. Each byte is transmitted least significant
bit first.
Table 19.
LSBit
CRC transmission rules
CRC 16 (8 bits)
LSByte
Doc ID 15170 Rev 12
MSBit
LSBit
Data storage format identifier (DSFID)
CRC 16 (8 bits)
MSByte
MSBit
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