MF0MOU2101DA4,118 NXP Semiconductors, MF0MOU2101DA4,118 Datasheet - Page 5

• Manufacturer Part Number: MF0MOU2101DA4,118
• Description: IC MIFARE ULTRALIGHT FCP PLLMC
• Manufacturer: NXP Semiconductors

Specifications of MF0MOU2101DA4,118

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443A / Mifare
• Package / Case: PLLMC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935287579118

NXP Semiconductors
MF0ICU2_SDS_32
Product short data sheet
PUBLIC
7.2 State diagram and logical states description
The commands are initiated by the PCD and controlled by the Command Interpreter of the
MF0ICU2. It handles the internal states (as shown in
generates the appropriate response.
For a correct implementation of an anticollision procedure please refer to the documents
in
Fig 3.
Section 10
Remark: Not shown in this diagram: In each state the command interpreter returns to the Idle state
if an unexpected command is received. If the IC has already been in the Halt state before it returns
to the Halt state in such a case.
State diagram
from address 0
READ
“References”.
of 4 byte
WRITE
of 4 byte
from address 0
WRITE
Rev. 3 — 19 May 2009
READ
IDLE
POR
REQA
WUPA
171432
AUTHENTICATED
of cascade level 1
of cascade level 2
AUTHENTICATE
READY 1
READY 2
SELECT
SELECT
ACTIVE
WUPA
HALT
ANTICOLLISION
ANTICOLLISION
of 16 byte
READ
of 16 byte
READ
Figure 3 “State
HALT
MIFARE Ultralight C
diagram”) and
HALT
MF0ICU2
identification
© NXP B.V. 2009. All rights reserved.
operations
procedure
selection
memory
001aai000
and
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