MFRC52201HN1,151 NXP Semiconductors, MFRC52201HN1,151 Datasheet - Page 98
MFRC52201HN1,151
Manufacturer Part Number
MFRC52201HN1,151
Description
IC READER 13.56MHZ 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52201HN1157.pdf
(109 pages)
Specifications of MFRC52201HN1,151
Rf Type
Read / Write
Frequency
13.56MHz
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935280547151
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NXP Semiconductors
30. Revision history
Table 177: Revision history
112132
Product data sheet
Document ID
112132
112131
112130
112121
112120
112110
112104
Release date
Mai 2007
September 2006
December 2005
September 2005
July 2005
July 2005
November 2004
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correction Interface PIN order in
Types”
correction
removed D0 from
removed 212, 424, 848 kbaud from
correction typical application circuit diagram
add selftest answer for version reg. 91h in
Introduction new NXP data sheet layout
Add
Characterization up to 848 kbit/s
Add notes to
Correction RFU description in
Correction access rights of bits 6-4 and 2-0 in
value: 00h”
Correction DTRQ to Output in
Types”
Combined “Absolute Maximum Ratings” and “ESD Characteristics“ in
Renamed
Document status changed to product specification
Change Ordering Information Chapter
Add Handling Information Chapter
Add Packing Information Chapter
Add Test Signal Examples in Chapter
Document status chacnged to preliminary specification
add package web-link (chapter 25)
add ordering information (chapter 5)
Document status changed to objective specification
changes in various register descriptions
SVDD Pin (chapter 7.2)
ParityDisable bit (chapter 9.2.1.14)
add MFIN / MFOUT description (chapter 11.4)
various spelling corrections
TxSelReg - bit DriverSel - combination 10
Section 4 “Quick reference data”
Table 161 “Input Pin characteristics for pin SDA”
Table 137
Table 3 “Pin description”
Data sheet status
Product datasheet
Product datasheet
Product data sheet
Preliminary data sheet
Objective data sheet
Table
150,
Rev. 3.2 — 22 May 2007
Table
Table 6 “Behavior of Register Bits and its Designation”
Table 135 “Connection Scheme for detecting the different Interface
Table 135 “Connection Scheme for detecting the different Interface
27
26
151,
Table 169
19.3
5
Table
Change notice
200705005F
Section 19.1 “Selftest”
Figure 32
Table 33 “BitFramingReg register (address 0Dh); reset
152,
Table 153
and delete “V
Doc. number
(see CPCN 200705005F)
Section 20 “Limiting values”
OL
Contactless Reader IC
and I
MFRC522
Supersedes
Revision 3.1
Revision 3.0
Revision 2.1
Revision 2.0
Revision 1.0
Revision 0.4
Revision 0.3
OL
© NXP B.V. 2007. All rights reserved.
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