IXFN32N120P IXYS, IXFN32N120P Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/3/352/ixys_sml.jpg)
IXFN32N120P
Manufacturer Part Number
IXFN32N120P
Description
MOSFET N-CH 1200V 32A SOT-227B
Manufacturer
IXYS
Series
Polar™r
Datasheet
1.IXFN32N120P.pdf
(5 pages)
Specifications of IXFN32N120P
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
310 mOhm @ 500mA, 10V
Drain To Source Voltage (vdss)
1200V (1.2kV)
Current - Continuous Drain (id) @ 25° C
32A
Vgs(th) (max) @ Id
6.5V @ 1mA
Gate Charge (qg) @ Vgs
360nC @ 10V
Input Capacitance (ciss) @ Vds
21000pF @ 25V
Power - Max
1000W
Mounting Type
Chassis Mount
Package / Case
SOT-227, miniBLOC
Configuration
Single Dual Source
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.31 Ohms
Drain-source Breakdown Voltage
1200 V
Gate-source Breakdown Voltage
+/- 30 V
Continuous Drain Current
32 A
Power Dissipation
830 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Vdss, Max, (v)
1200
Id(cont), Tc=25°c, (a)
32
Rds(on), Max, Tj=25°c, (?)
0.31
Ciss, Typ, (pf)
21000
Qg, Typ, (nc)
360
Trr, Typ, (ns)
-
Trr, Max, (ns)
300
Pd, (w)
1000
Rthjc, Max, (ºc/w)
0.125
Package Style
SOT-227B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IXFN32N120P
Quantity:
148
IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.
100,000
10,000
1,000
100
100
90
80
70
60
50
40
30
20
10
50
45
40
35
30
25
20
15
10
10
5
0
0
0.3
5.0
0
f = 1 MHz
Fig. 9. Forward Voltage Drop of Intrinsic Diode
0.4
5.5
5
0.5
6.0
10
Fig. 7. Input Admittance
0.6
Fig. 11. Capacitance
6.5
T
15
J
= 125ºC
T
- 40ºC
J
V
V
0.7
V
25ºC
SD
= 125ºC
DS
GS
- Volts
7.0
- Volts
20
- Volts
0.8
7.5
25
0.9
T
8.0
J
30
1.0
= 25ºC
C iss
C oss
C rss
8.5
35
1.1
1.2
9.0
40
1000
0.01
100
0.1
70
60
50
40
30
20
10
16
14
12
10
10
0
1
8
6
4
2
0
10
0
0
T
Tc = 25ºC
Single Pulse
V
I
I
D
G
R
J
DS
50
= 150ºC
DS(on)
5
= 16A
= 10mA
= 600V
Fig. 12. Forward-Bias Safe Operating Area
Limit
100
10
150
Fig. 8. Transconductance
15
100
Fig. 10. Gate Charge
Q
200
20
G
V
- NanoCoulombs
DS
I
D
- Volts
- Amperes
250
25
IXFN32N120P
300
DC
30
1,000
350
35
25µs
100µs
1ms
10ms
100ms
T
J
= - 40ºC
400
40
25ºC
125ºC
450
45
10,000
500
50