ATMEGA649V-8AUR Atmel, ATMEGA649V-8AUR Datasheet - Page 389
![IC AVR MCU FLASH 64K 1.8V 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA649V-8AUR
Manufacturer Part Number
ATMEGA649V-8AUR
Description
IC AVR MCU FLASH 64K 1.8V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA329-16AU.pdf
(392 pages)
Specifications of ATMEGA649V-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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2552K–AVR–04/11
23 LCD Controller ..................................................................................... 228
24 JTAG Interface and On-chip Debug System ..................................... 245
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 251
26 Boot Loader Support – Read-While-Write Self-Programming ......... 278
22.4
22.5
22.6
22.7
23.1
23.2
23.3
23.4
24.1
24.2
24.3
24.4
24.5
24.6
24.7
24.8
24.9
24.10
25.1
25.2
25.3
25.4
25.5
25.6
25.7
25.8
26.1
26.2
26.3
26.4
26.5
Prescaling and Conversion Timing ................................................................214
Changing Channel or Reference Selection ...................................................216
ADC Conversion Result .................................................................................221
Register Description ......................................................................................223
Features ........................................................................................................228
Mode of Operation .........................................................................................231
LCD Usage ....................................................................................................235
Register Description ......................................................................................239
Features ........................................................................................................245
Overview ........................................................................................................245
Test Access Port – TAP ................................................................................245
TAP Controller ...............................................................................................247
Using the Boundary-scan Chain ....................................................................248
Using the On-chip Debug System .................................................................248
On-chip Debug Specific JTAG Instructions ...................................................249
Using the JTAG Programming Capabilities ...................................................250
Bibliography ...................................................................................................250
Register Description ......................................................................................250
Features ........................................................................................................251
System Overview ...........................................................................................251
Data Registers ...............................................................................................251
Boundary-scan Specific JTAG Instructions ...................................................253
Boundary-scan Related Register in I/O Memory ...........................................254
Boundary-scan Chain ....................................................................................255
ATmega329/3290/649/6490 Boundary-scan Order .......................................264
Boundary-scan Description Language Files ..................................................277
Features ........................................................................................................278
Application and Boot Loader Flash Sections .................................................278
Read-While-Write and No Read-While-Write Flash Sections ........................278
Boot Loader Lock Bits ...................................................................................281
Entering the Boot Loader Program ................................................................282
ATmega329/3290/649/6490
v
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